45 /*
46 * On a virtualized platform a virtual cpu may not be actually
47 * on a physical cpu, especially in situations where a configuration has
48 * more vcpus than pcpus. This function tells us (if it's able) if the
49 * specified vcpu is currently running on a pcpu. Note if it is not
50 * known or not able to determine, it will return the unknown state.
51 */
52 #define VCPU_STATE_UNKNOWN 0
53 #define VCPU_ON_PCPU 1
54 #define VCPU_NOT_ON_PCPU 2
55
56 extern int vcpu_on_pcpu(processorid_t);
57
58 /*
59 * Machine specific fields of the cpu struct
60 * defined in common/sys/cpuvar.h.
61 *
62 * Note: This is kinda kludgy but seems to be the best
63 * of our alternatives.
64 */
65 typedef void *cpu_pri_lev_t;
66
67 struct cpuid_info;
68 struct cpu_ucode_info;
69 struct cmi_hdl;
70
71 /*
72 * A note about the hypervisor affinity bits: a one bit in the affinity mask
73 * means the corresponding event channel is allowed to be serviced
74 * by this cpu.
75 */
76 struct xen_evt_data {
77 ulong_t pending_sel[PIL_MAX + 1]; /* event array selectors */
78 ulong_t pending_evts[PIL_MAX + 1][sizeof (ulong_t) * 8];
79 ulong_t evt_affinity[sizeof (ulong_t) * 8]; /* service on cpu */
80 };
81
82 struct machcpu {
83 /*
84 * x_call fields - used for interprocessor cross calls
85 */
86 struct xc_msg *xc_msgbox;
87 struct xc_msg *xc_free;
88 xc_data_t xc_data;
89 uint32_t xc_wait_cnt;
90 volatile uint32_t xc_work_cnt;
91
92 int mcpu_nodeid; /* node-id */
93 int mcpu_pri; /* CPU priority */
94 cpu_pri_lev_t mcpu_pri_data; /* ptr to machine dependent */
95 /* data for setting priority */
96 /* level */
97
98 struct hat *mcpu_current_hat; /* cpu's current hat */
99
100 struct hat_cpu_info *mcpu_hat_info;
101
102 volatile ulong_t mcpu_tlb_info;
103
104 /* i86 hardware table addresses that cannot be shared */
105
106 user_desc_t *mcpu_gdt; /* GDT */
107 gate_desc_t *mcpu_idt; /* current IDT */
108
109 tss_t *mcpu_tss; /* TSS */
110
111 kmutex_t mcpu_ppaddr_mutex;
112 caddr_t mcpu_caddr1; /* per cpu CADDR1 */
113 caddr_t mcpu_caddr2; /* per cpu CADDR2 */
114 uint64_t mcpu_caddr1pte;
115 uint64_t mcpu_caddr2pte;
116
148 * whenever an interrupt happens. Userful for detecting
149 * if a section of code gets interrupted.
150 * The high order 16 bits will hold the cpu->cpu_id.
151 * The low order bits will be incremented on every interrupt.
152 */
153 volatile uint32_t mcpu_istamp;
154 };
155
156 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */
157 #define MWAIT_HALTED (1) /* mcpu_mwait set when halting */
158 #define MWAIT_RUNNING (0) /* mcpu_mwait set to wakeup */
159 #define MWAIT_WAKEUP_IPI (2) /* need IPI to wakeup */
160 #define MWAIT_WAKEUP(cpu) (*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING)
161
162 #endif /* _ASM */
163
164 /* Please DON'T add any more of this namespace-poisoning sewage here */
165
166 #define cpu_nodeid cpu_m.mcpu_nodeid
167 #define cpu_pri cpu_m.mcpu_pri
168 #define cpu_pri_data cpu_m.mcpu_pri_data
169 #define cpu_current_hat cpu_m.mcpu_current_hat
170 #define cpu_hat_info cpu_m.mcpu_hat_info
171 #define cpu_ppaddr_mutex cpu_m.mcpu_ppaddr_mutex
172 #define cpu_gdt cpu_m.mcpu_gdt
173 #define cpu_idt cpu_m.mcpu_idt
174 #define cpu_tss cpu_m.mcpu_tss
175 #define cpu_ldt cpu_m.mcpu_ldt
176 #define cpu_caddr1 cpu_m.mcpu_caddr1
177 #define cpu_caddr2 cpu_m.mcpu_caddr2
178 #define cpu_softinfo cpu_m.mcpu_softinfo
179 #define cpu_caddr1pte cpu_m.mcpu_caddr1pte
180 #define cpu_caddr2pte cpu_m.mcpu_caddr2pte
181
182 #ifdef __cplusplus
183 }
184 #endif
185
186 #endif /* _SYS_MACHCPUVAR_H */
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45 /*
46 * On a virtualized platform a virtual cpu may not be actually
47 * on a physical cpu, especially in situations where a configuration has
48 * more vcpus than pcpus. This function tells us (if it's able) if the
49 * specified vcpu is currently running on a pcpu. Note if it is not
50 * known or not able to determine, it will return the unknown state.
51 */
52 #define VCPU_STATE_UNKNOWN 0
53 #define VCPU_ON_PCPU 1
54 #define VCPU_NOT_ON_PCPU 2
55
56 extern int vcpu_on_pcpu(processorid_t);
57
58 /*
59 * Machine specific fields of the cpu struct
60 * defined in common/sys/cpuvar.h.
61 *
62 * Note: This is kinda kludgy but seems to be the best
63 * of our alternatives.
64 */
65
66 struct cpuid_info;
67 struct cpu_ucode_info;
68 struct cmi_hdl;
69
70 /*
71 * A note about the hypervisor affinity bits: a one bit in the affinity mask
72 * means the corresponding event channel is allowed to be serviced
73 * by this cpu.
74 */
75 struct xen_evt_data {
76 ulong_t pending_sel[PIL_MAX + 1]; /* event array selectors */
77 ulong_t pending_evts[PIL_MAX + 1][sizeof (ulong_t) * 8];
78 ulong_t evt_affinity[sizeof (ulong_t) * 8]; /* service on cpu */
79 };
80
81 struct machcpu {
82 /*
83 * x_call fields - used for interprocessor cross calls
84 */
85 struct xc_msg *xc_msgbox;
86 struct xc_msg *xc_free;
87 xc_data_t xc_data;
88 uint32_t xc_wait_cnt;
89 volatile uint32_t xc_work_cnt;
90
91 int mcpu_nodeid; /* node-id */
92 int mcpu_pri; /* CPU priority */
93
94 struct hat *mcpu_current_hat; /* cpu's current hat */
95
96 struct hat_cpu_info *mcpu_hat_info;
97
98 volatile ulong_t mcpu_tlb_info;
99
100 /* i86 hardware table addresses that cannot be shared */
101
102 user_desc_t *mcpu_gdt; /* GDT */
103 gate_desc_t *mcpu_idt; /* current IDT */
104
105 tss_t *mcpu_tss; /* TSS */
106
107 kmutex_t mcpu_ppaddr_mutex;
108 caddr_t mcpu_caddr1; /* per cpu CADDR1 */
109 caddr_t mcpu_caddr2; /* per cpu CADDR2 */
110 uint64_t mcpu_caddr1pte;
111 uint64_t mcpu_caddr2pte;
112
144 * whenever an interrupt happens. Userful for detecting
145 * if a section of code gets interrupted.
146 * The high order 16 bits will hold the cpu->cpu_id.
147 * The low order bits will be incremented on every interrupt.
148 */
149 volatile uint32_t mcpu_istamp;
150 };
151
152 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */
153 #define MWAIT_HALTED (1) /* mcpu_mwait set when halting */
154 #define MWAIT_RUNNING (0) /* mcpu_mwait set to wakeup */
155 #define MWAIT_WAKEUP_IPI (2) /* need IPI to wakeup */
156 #define MWAIT_WAKEUP(cpu) (*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING)
157
158 #endif /* _ASM */
159
160 /* Please DON'T add any more of this namespace-poisoning sewage here */
161
162 #define cpu_nodeid cpu_m.mcpu_nodeid
163 #define cpu_pri cpu_m.mcpu_pri
164 #define cpu_current_hat cpu_m.mcpu_current_hat
165 #define cpu_hat_info cpu_m.mcpu_hat_info
166 #define cpu_ppaddr_mutex cpu_m.mcpu_ppaddr_mutex
167 #define cpu_gdt cpu_m.mcpu_gdt
168 #define cpu_idt cpu_m.mcpu_idt
169 #define cpu_tss cpu_m.mcpu_tss
170 #define cpu_ldt cpu_m.mcpu_ldt
171 #define cpu_caddr1 cpu_m.mcpu_caddr1
172 #define cpu_caddr2 cpu_m.mcpu_caddr2
173 #define cpu_softinfo cpu_m.mcpu_softinfo
174 #define cpu_caddr1pte cpu_m.mcpu_caddr1pte
175 #define cpu_caddr2pte cpu_m.mcpu_caddr2pte
176
177 #ifdef __cplusplus
178 }
179 #endif
180
181 #endif /* _SYS_MACHCPUVAR_H */
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