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4664 CPU->cpu_pri_data hasn't been used for years
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--- old/usr/src/uts/i86pc/sys/machcpuvar.h
+++ new/usr/src/uts/i86pc/sys/machcpuvar.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21 /*
22 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
23 23 * Use is subject to license terms.
24 24 */
25 25 /*
26 26 * Copyright 2011 Joyent, Inc. All rights reserved.
27 27 */
28 28
29 29 #ifndef _SYS_MACHCPUVAR_H
30 30 #define _SYS_MACHCPUVAR_H
31 31
32 32 #ifdef __cplusplus
33 33 extern "C" {
34 34 #endif
35 35
36 36 #include <sys/inttypes.h>
37 37 #include <sys/x_call.h>
38 38 #include <sys/tss.h>
39 39 #include <sys/segments.h>
40 40 #include <sys/rm_platter.h>
41 41 #include <sys/avintr.h>
42 42 #include <sys/pte.h>
43 43
44 44 #ifndef _ASM
45 45 /*
46 46 * On a virtualized platform a virtual cpu may not be actually
47 47 * on a physical cpu, especially in situations where a configuration has
48 48 * more vcpus than pcpus. This function tells us (if it's able) if the
49 49 * specified vcpu is currently running on a pcpu. Note if it is not
50 50 * known or not able to determine, it will return the unknown state.
51 51 */
52 52 #define VCPU_STATE_UNKNOWN 0
53 53 #define VCPU_ON_PCPU 1
54 54 #define VCPU_NOT_ON_PCPU 2
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55 55
56 56 extern int vcpu_on_pcpu(processorid_t);
57 57
58 58 /*
59 59 * Machine specific fields of the cpu struct
60 60 * defined in common/sys/cpuvar.h.
61 61 *
62 62 * Note: This is kinda kludgy but seems to be the best
63 63 * of our alternatives.
64 64 */
65 -typedef void *cpu_pri_lev_t;
66 65
67 66 struct cpuid_info;
68 67 struct cpu_ucode_info;
69 68 struct cmi_hdl;
70 69
71 70 /*
72 71 * A note about the hypervisor affinity bits: a one bit in the affinity mask
73 72 * means the corresponding event channel is allowed to be serviced
74 73 * by this cpu.
75 74 */
76 75 struct xen_evt_data {
77 76 ulong_t pending_sel[PIL_MAX + 1]; /* event array selectors */
78 77 ulong_t pending_evts[PIL_MAX + 1][sizeof (ulong_t) * 8];
79 78 ulong_t evt_affinity[sizeof (ulong_t) * 8]; /* service on cpu */
80 79 };
81 80
82 81 struct machcpu {
83 82 /*
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84 83 * x_call fields - used for interprocessor cross calls
85 84 */
86 85 struct xc_msg *xc_msgbox;
87 86 struct xc_msg *xc_free;
88 87 xc_data_t xc_data;
89 88 uint32_t xc_wait_cnt;
90 89 volatile uint32_t xc_work_cnt;
91 90
92 91 int mcpu_nodeid; /* node-id */
93 92 int mcpu_pri; /* CPU priority */
94 - cpu_pri_lev_t mcpu_pri_data; /* ptr to machine dependent */
95 - /* data for setting priority */
96 - /* level */
97 93
98 94 struct hat *mcpu_current_hat; /* cpu's current hat */
99 95
100 96 struct hat_cpu_info *mcpu_hat_info;
101 97
102 98 volatile ulong_t mcpu_tlb_info;
103 99
104 100 /* i86 hardware table addresses that cannot be shared */
105 101
106 102 user_desc_t *mcpu_gdt; /* GDT */
107 103 gate_desc_t *mcpu_idt; /* current IDT */
108 104
109 105 tss_t *mcpu_tss; /* TSS */
110 106
111 107 kmutex_t mcpu_ppaddr_mutex;
112 108 caddr_t mcpu_caddr1; /* per cpu CADDR1 */
113 109 caddr_t mcpu_caddr2; /* per cpu CADDR2 */
114 110 uint64_t mcpu_caddr1pte;
115 111 uint64_t mcpu_caddr2pte;
116 112
117 113 struct softint mcpu_softinfo;
118 114 uint64_t pil_high_start[HIGH_LEVELS];
119 115 uint64_t intrstat[PIL_MAX + 1][2];
120 116
121 117 struct cpuid_info *mcpu_cpi;
122 118
123 119 #if defined(__amd64)
124 120 greg_t mcpu_rtmp_rsp; /* syscall: temporary %rsp stash */
125 121 greg_t mcpu_rtmp_r15; /* syscall: temporary %r15 stash */
126 122 #endif
127 123
128 124 struct vcpu_info *mcpu_vcpu_info;
129 125 uint64_t mcpu_gdtpa; /* hypervisor: GDT physical address */
130 126
131 127 uint16_t mcpu_intr_pending; /* hypervisor: pending intrpt levels */
132 128 uint16_t mcpu_ec_mbox; /* hypervisor: evtchn_dev mailbox */
133 129 struct xen_evt_data *mcpu_evt_pend; /* hypervisor: pending events */
134 130
135 131 volatile uint32_t *mcpu_mwait; /* MONITOR/MWAIT buffer */
136 132 void (*mcpu_idle_cpu)(void); /* idle function */
137 133 uint16_t mcpu_idle_type; /* CPU next idle type */
138 134 uint16_t max_cstates; /* supported max cstates */
139 135
140 136 struct cpu_ucode_info *mcpu_ucode_info;
141 137
142 138 void *mcpu_pm_mach_state;
143 139 struct cmi_hdl *mcpu_cmi_hdl;
144 140 void *mcpu_mach_ctx_ptr;
145 141
146 142 /*
147 143 * A stamp that is unique per processor and changes
148 144 * whenever an interrupt happens. Userful for detecting
149 145 * if a section of code gets interrupted.
150 146 * The high order 16 bits will hold the cpu->cpu_id.
151 147 * The low order bits will be incremented on every interrupt.
152 148 */
153 149 volatile uint32_t mcpu_istamp;
154 150 };
155 151
156 152 #define NINTR_THREADS (LOCK_LEVEL-1) /* number of interrupt threads */
157 153 #define MWAIT_HALTED (1) /* mcpu_mwait set when halting */
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158 154 #define MWAIT_RUNNING (0) /* mcpu_mwait set to wakeup */
159 155 #define MWAIT_WAKEUP_IPI (2) /* need IPI to wakeup */
160 156 #define MWAIT_WAKEUP(cpu) (*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING)
161 157
162 158 #endif /* _ASM */
163 159
164 160 /* Please DON'T add any more of this namespace-poisoning sewage here */
165 161
166 162 #define cpu_nodeid cpu_m.mcpu_nodeid
167 163 #define cpu_pri cpu_m.mcpu_pri
168 -#define cpu_pri_data cpu_m.mcpu_pri_data
169 164 #define cpu_current_hat cpu_m.mcpu_current_hat
170 165 #define cpu_hat_info cpu_m.mcpu_hat_info
171 166 #define cpu_ppaddr_mutex cpu_m.mcpu_ppaddr_mutex
172 167 #define cpu_gdt cpu_m.mcpu_gdt
173 168 #define cpu_idt cpu_m.mcpu_idt
174 169 #define cpu_tss cpu_m.mcpu_tss
175 170 #define cpu_ldt cpu_m.mcpu_ldt
176 171 #define cpu_caddr1 cpu_m.mcpu_caddr1
177 172 #define cpu_caddr2 cpu_m.mcpu_caddr2
178 173 #define cpu_softinfo cpu_m.mcpu_softinfo
179 174 #define cpu_caddr1pte cpu_m.mcpu_caddr1pte
180 175 #define cpu_caddr2pte cpu_m.mcpu_caddr2pte
181 176
182 177 #ifdef __cplusplus
183 178 }
184 179 #endif
185 180
186 181 #endif /* _SYS_MACHCPUVAR_H */
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