bcm2835: remove workaround for u-boot
Since we are not using u-boot, we don't need a work-around for it.
bcm2835: enable access to p10 and p11
When determining whether or not we are running on a supported processor, we
call arm_cpuid_vfpidreg.  This function attempts to get the FPSID which
involves talking to p10.  It however turns out that after a reset only p14
and p15 are accessible.  So, before handing off control to _fakebop_start,
let's enable access to p10 and p11 (privileged mode only).
NOTE: qemu doesn't seem to behave the same - it lets us access p10 & p11
without us doing anything special.

*** 9,18 ****
--- 9,19 ----
   * http://www.illumos.org/license/CDDL.
   */
  
  /*
   * Copyright 2013 (c) Joyent, Inc. All rights reserved.
+  * Copyright 2015 (c) Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
   */
  
  #include <sys/asm_linkage.h>
  #include <sys/machparam.h>
  #include <sys/cpu_asm.h>
*** 99,115 ****
          /* Disable A (disables strict alignment checks) */
          mrc     p15, 0, r3, c1, c0, 0
          bic     r3, r3, #2
          mcr     p15, 0, r3, c1, c0, 0
  
!         /*
!          * XXX Currently we're using u-boot to allow us to make forward progress
!          * while the .data section is a bit tumultuous. It loads that, but we
!          * can say for certain that it does not correctly pass in the machid and
!          * tagstart. Since we know what it is, we manually fix it up here.
!          */
!         mov r2,#0x100
          bl _fakebop_start
          SET_SIZE(_start)
  
          ENTRY(arm_reg_read)
          ldr r0, [r0]
--- 100,114 ----
          /* Disable A (disables strict alignment checks) */
          mrc     p15, 0, r3, c1, c0, 0
          bic     r3, r3, #2
          mcr     p15, 0, r3, c1, c0, 0
  
!         /* Enable access to p10 and p11 (privileged mode only) */
!         mrc     p15, 0, r0, c1, c0, 2
!         orr     r0, #0x00500000
!         mcr     p15, 0, r0, c1, c0, 2
! 
          bl _fakebop_start
          SET_SIZE(_start)
  
          ENTRY(arm_reg_read)
          ldr r0, [r0]