1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright 2013 (c) Joyent, Inc. All rights reserved. 14 */ 15 16 /* 17 * Every story needs a beginning, this is the loader's. 18 */ 19 20 #include <sys/asm_linkage.h> 21 22 ENTRY(_start) 23 mov sp, #0x8000 24 /* 25 * XXX manually fix up the tag start 26 */ 27 mov r2, #0x100 28 bl fakeload_init 29 SET_SIZE(_start) 30 31 #if defined(__lint) 32 33 /* ARGSUSED */ 34 void 35 fakeload_unaligned_enable(void) 36 {} 37 38 #else /* __lint */ 39 40 /* 41 * Fix up alignment by turning off A and by turning on U. 42 */ 43 ENTRY(fakeload_unaligned_enable) 44 mrc p15, 0, r0, c1, c0, 0 45 orr r0, #0x400000 46 mcr p15, 0, r0, c1, c0, 0 47 bx lr 48 SET_SIZE(fakeload_unaligned_enable); 49 50 #endif /* __lint */ 51 52 #if defined(__lint) 53 54 fakeload_pt_setup(uintptr_t ptroot) 55 {} 56 57 #else /* __lint */ 58 59 /* 60 * We need to set up the world for the first time. We'll do the 61 * following in order: 62 * 63 * o Set the TTBCR to always use TTBR0 64 * o Set domain 0 to manager mode 65 * o Program the Page table root 66 */ 67 ENTRY(fakeload_pt_setup) 68 mov r1, #0 69 mcr p15, 0, r1, c2, c0, 2 70 mov r1, #3 71 mcr p15, 0, r1, c3, c0, 0 72 orr r0, r0, #0x1b 73 mcr p15, 0, r0, c2, c0, 0 74 bx lr 75 SET_SIZE(fakeload_pt_setup) 76 77 #endif /* __lint */ 78 79 #if defined(__lint) 80 81 /* ARGSUSED */ 82 void 83 fakeload_mmu_enable(void) 84 {} 85 86 #else /* __lint */ 87 88 /* 89 * We first make sure that the ARMv6 pages are enabled (bit 23) and then 90 * enable the MMU (bit 0). 91 */ 92 ENTRY(fakeload_mmu_enable) 93 mrc p15, 0, r0, c1, c0, 0 94 orr r0, #0x800000 95 mcr p15, 0, r0, c1, c0, 0 96 mrc p15, 0, r0, c1, c0, 0 97 orr r0, #0x1 98 mcr p15, 0, r0, c1, c0, 0 99 bx lr 100 SET_SIZE(fakeload_mmu_enable) 101 #endif /* __lint */ 102 103 104 ENTRY(fakeload_exec) 105 mov r4, r0 106 mov r2, #0x100 107 blx r4 108 /* We should never execute this. If we do we'll go back to a panic */ 109 bx lr 110 SET_SIZE(fakeload_exec)