bcm2835: move strict alignment check disable code into the loader
Since the loader wants to muck with alignment related bits of the SCTLR
anyway, it should set both A and U to the desired values (0 and 1
respectively).

          --- old/usr/src/uts/armv6/bcm2835/ml/locore.s
          +++ new/usr/src/uts/armv6/bcm2835/ml/locore.s

   1    1  /*
   2    2   * This file and its contents are supplied under the terms of the
   3    3   * Common Development and Distribution License ("CDDL"), version 1.0.
   4    4   * You may only use this file in accordance with the terms of version
   5    5   * 1.0 of the CDDL.
   6    6   *
   7    7   * A full copy of the text of the CDDL should have accompanied this
   8    8   * source.  A copy of the CDDL is also available via the Internet at
   9    9   * http://www.illumos.org/license/CDDL.
  10   10   */
  11   11  
  12   12  /*
  13   13   * Copyright 2013 (c) Joyent, Inc. All rights reserved.
  14   14   * Copyright 2015 (c) Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
  15   15   */
  16   16  
  17   17  #include <sys/asm_linkage.h>
  18   18  #include <sys/machparam.h>
  19   19  #include <sys/cpu_asm.h>
  20   20  
  21   21  /*
  22   22   * Every story needs a beginning. This is ours.
  23   23   */
  24   24  
  25   25  /*
  26   26   * We are in a primordial world here. The BMC2835 is going to come along and
  27   27   * boot us at _start. Normally we would go ahead and use a main() function, but
  28   28   * for now, we'll do that ourselves. As we've started the world, we also need to
  29   29   * set up a few things about us, for example our stack pointer. To help us out,
  30   30   * it's useful to remember the rough memory map. Remember, this is for physcial
  31   31   * addresses. There is no virtual memory here. These sizes are often manipulated
  32   32   * by the 'configuration' in the bootloader.
  33   33   *
  34   34   * +----------------+ <---- Max physical memory
  35   35   * |                |
  36   36   * |                |
  37   37   * |                |
  38   38   * +----------------+
  39   39   * |                |
  40   40   * |      I/O       |
  41   41   * |  Peripherals   |
  42   42   * |                |
  43   43   * +----------------+ <---- I/O base 0x20000000 (corresponds to 0x7E000000)
  44   44   * |                |
  45   45   * |     Main       |
  46   46   * |    Memory      |
  47   47   * |                |
  48   48   * +----------------+ <---- Top of SDRAM
  49   49   * |                |
  50   50   * |       VC       |
  51   51   * |     SDRAM      |
  52   52   * |                |
  53   53   * +----------------+ <---- Split determined by bootloader config
  54   54   * |                |
  55   55   * |      ARM       |
  56   56   * |     SDRAM      |
  57   57   * |                |
  58   58   * +----------------+ <---- Bottom of physical memory 0x00000000
  59   59   *
  60   60   * With the Raspberry Pi Model B, we have 512 MB of SDRAM. That means we have a
  61   61   * range of addresses from [0, 0x20000000). If we assume that the minimum amount
  62   62   * of DRAM is given to the GPU - 32 MB, that means we really have the following
  63   63   * range: [0, 0x1e000000).
  64   64   *
  65   65   * By default, this binary will be loaded into 0x8000. For now, that means we
  66   66   * will set our initial stack to 0x10000000.
  67   67   */
  68   68  
  69   69  /*
  70   70   * Recall that _start is the traditional entry point for an ELF binary.
  71   71   */
  72   72          ENTRY(_start)
  73   73          ldr sp, =t0stack
  74   74          ldr r4, =DEFAULTSTKSZ
  75   75          add sp, r4
  76   76          bic sp, sp, #0xff
  77   77  
  78   78          /*
  79   79           * establish bogus stacks for exceptional CPU states, our exception
  80   80           * code should never make use of these, and we want loud and violent
  81   81           * failure should we accidentally try.
  82   82           */
  83   83          cps #(CPU_MODE_UND)
  84   84          mov sp, #-1
  85   85          cps #(CPU_MODE_ABT)
  86   86          mov sp, #-1
  87   87          cps #(CPU_MODE_FIQ)
  88   88          mov sp, #-1
  89   89          cps #(CPU_MODE_IRQ)

  90   90          mov sp, #-1
  91   91          cps #(CPU_MODE_SVC)
  92   92  
  93   93          /* Enable highvecs (moves the base of the exception vector) */
  94   94          mrc     p15, 0, r3, c1, c0, 0
  95   95          mov     r4, #1
  96   96          lsl     r4, r4, #13
  97   97          orr     r3, r3, r4
  98   98          mcr     p15, 0, r3, c1, c0, 0
  99   99  
 100      -        /* Disable A (disables strict alignment checks) */
 101      -        mrc     p15, 0, r3, c1, c0, 0
 102      -        bic     r3, r3, #2
 103      -        mcr     p15, 0, r3, c1, c0, 0
 104      -
 105  100          /* Enable access to p10 and p11 (privileged mode only) */
 106  101          mrc     p15, 0, r0, c1, c0, 2
 107  102          orr     r0, #0x00500000
 108  103          mcr     p15, 0, r0, c1, c0, 2
 109  104  
 110  105          bl _fakebop_start
 111  106          SET_SIZE(_start)
 112  107  
 113  108          ENTRY(arm_reg_read)
 114  109          ldr r0, [r0]
 115  110          bx lr
 116  111          SET_SIZE(arm_reg_read)
 117  112  
 118  113          ENTRY(arm_reg_write)
 119  114          str r1, [r0]
 120  115          bx lr
 121  116          SET_SIZE(arm_reg_write)
    

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