bcm2835: move strict alignment check disable code into the loader
Since the loader wants to muck with alignment related bits of the SCTLR
anyway, it should set both A and U to the desired values (0 and 1
respectively).

          --- old/usr/src/uts/armv6/loader/fakeloader_core.s
          +++ new/usr/src/uts/armv6/loader/fakeloader_core.s

   1    1  /*
   2    2   * This file and its contents are supplied under the terms of the
   3    3   * Common Development and Distribution License ("CDDL"), version 1.0.
   4    4   * You may only use this file in accordance with the terms of version
   5    5   * 1.0 of the CDDL.
   6    6   *
   7    7   * A full copy of the text of the CDDL should have accompanied this
   8    8   * source.  A copy of the CDDL is also available via the Internet at
   9    9   * http://www.illumos.org/license/CDDL.
  10   10   */
  11   11  
  12   12  /*
  13   13   * Copyright 2013 (c) Joyent, Inc. All rights reserved.
  14   14   * Copyright 2015 (c) Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
  15   15   */
  16   16  
  17   17  /*
  18   18   * Every story needs a beginning, this is the loader's.
  19   19   */
  20   20  
  21   21  #include <sys/asm_linkage.h>
  22   22  
  23   23  /*
  24   24   * We put _start into the .text.init section so we can more easily shove it
  25   25   * at the front of the .text.
  26   26   */
  27   27          .section .text.init
  28   28          .align  4
  29   29          .globl  _start
  30   30          .type   _start, %function
  31   31  _start:
  32   32          mov     sp, #0x8000
  33   33          /*
  34   34           * XXX manually fix up the tag start
  35   35           */
  36   36          mov     r2, #0x100
  37   37          bl      fakeload_init
  38   38          SET_SIZE(_start)
  39   39  
  40   40  #if defined(__lint)
  41   41  
  42   42  /* ARGSUSED */
  43   43  void

  44   44  fakeload_unaligned_enable(void)
  45   45  {}
  46   46  
  47   47  #else   /* __lint */
  48   48  
  49   49          /*
  50   50           * Fix up alignment by turning off A and by turning on U.
  51   51           */
  52   52          ENTRY(fakeload_unaligned_enable)
  53   53          mrc     p15, 0, r0, c1, c0, 0
  54      -        orr     r0, #0x400000
       54 +        orr     r0, #0x400000   /* U = 1 */
       55 +        bic     r0, r0, #2      /* A = 0 */
  55   56          mcr     p15, 0, r0, c1, c0, 0
  56   57          bx      lr
  57   58          SET_SIZE(fakeload_unaligned_enable);
  58   59  
  59   60  #endif  /* __lint */
  60   61  
  61   62  #if defined(__lint)
  62   63  
  63   64  fakeload_pt_setup(uintptr_t ptroot)
  64   65  {}

  65   66  
  66   67  #else /* __lint */
  67   68  
  68   69          /*
  69   70           * We need to set up the world for the first time. We'll do the
  70   71           * following in order:
  71   72           *
  72   73           * o Set the TTBCR to always use TTBR0
  73   74           * o Set domain 0 to manager mode
  74   75           * o Program the Page table root
  75   76           */
  76   77          ENTRY(fakeload_pt_setup)
  77   78          mov     r1, #0
  78   79          mcr     p15, 0, r1, c2, c0, 2
  79   80          mov     r1, #3
  80   81          mcr     p15, 0, r1, c3, c0, 0
  81   82          orr     r0, r0, #0x1b
  82   83          mcr     p15, 0, r0, c2, c0, 0
  83   84          bx      lr
  84   85          SET_SIZE(fakeload_pt_setup)
  85   86  
  86   87  #endif /* __lint */
  87   88  
  88   89  #if defined(__lint)
  89   90  
  90   91  /* ARGSUSED */
  91   92  void
  92   93  fakeload_mmu_enable(void)
  93   94  {}
  94   95  
  95   96  #else   /* __lint */
  96   97  
  97   98          /*
  98   99           * We first make sure that the ARMv6 pages are enabled (bit 23) and then
  99  100           * enable the MMU (bit 0).
 100  101           */
 101  102          ENTRY(fakeload_mmu_enable)
 102  103          mrc     p15, 0, r0, c1, c0, 0
 103  104          orr     r0, #0x800000
 104  105          mcr     p15, 0, r0, c1, c0, 0
 105  106          mrc     p15, 0, r0, c1, c0, 0
 106  107          orr     r0, #0x1
 107  108          mcr     p15, 0, r0, c1, c0, 0
 108  109          bx      lr
 109  110          SET_SIZE(fakeload_mmu_enable)
 110  111  #endif  /* __lint */
 111  112  
 112  113  
 113  114          ENTRY(fakeload_exec)
 114  115          blx     r3
 115  116          /* We should never execute this. If we do we'll go back to a panic */
 116  117          bx      lr
 117  118          SET_SIZE(fakeload_exec)

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