1 /*
2 * This file and its contents are supplied under the terms of the
3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 .file "trap.s"
13
14 #include <sys/asm_linkage.h>
15 #include <sys/cpu_asm.h>
16
17 /*
18 * Create a section into which to place the exception vector, such that we can
19 * force it to be mapped where it needs to be. Currently at 0x0, since
20 * we don't set the high vector bit (SCTLR.V)
21 *
22 * Each instruction in the vector jumps to its own address + 24, which is the
23 * matching entry in exception_table. We do this to insure that we get
24 * effectively infinite displacement, which we can't achieve in one
25 * instruction otherwise (and gas complains).
26 *
27 * The handler for each exception type saves a trap frame (struct regs, though
28 * with some bits unusual) and calls the associated handler from trap_table.
29 *
30 * XXX: On CPUs with the security extensions, there are actually 2 additional
31 * exception vectors: secure, and monitor. We ignore them.
32 */
33 .pushsection ".exception_vector", "ax"
34 ldr pc, [pc, #24]
35 ldr pc, [pc, #24]
36 ldr pc, [pc, #24]
37 ldr pc, [pc, #24]
38 ldr pc, [pc, #24]
39 ldr pc, [pc, #24]
40 ldr pc, [pc, #24]
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1 /*
2 * This file and its contents are supplied under the terms of the
3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 * You may only use this file in accordance with the terms of version
5 * 1.0 of the CDDL.
6 *
7 * A full copy of the text of the CDDL should have accompanied this
8 * source. A copy of the CDDL is also available via the Internet at
9 * http://www.illumos.org/license/CDDL.
10 */
11
12 .file "trap.s"
13
14 #include <sys/asm_linkage.h>
15 #include <sys/cpu_asm.h>
16
17 /*
18 * Create a section into which to place the exception vector, such that we can
19 * force it to be mapped where it needs to be.
20 *
21 * Each instruction in the vector jumps to its own address + 24, which is the
22 * matching entry in exception_table. We do this to insure that we get
23 * effectively infinite displacement, which we can't achieve in one
24 * instruction otherwise (and gas complains).
25 *
26 * The handler for each exception type saves a trap frame (struct regs, though
27 * with some bits unusual) and calls the associated handler from trap_table.
28 *
29 * XXX: On CPUs with the security extensions, there are actually 2 additional
30 * exception vectors: secure, and monitor. We ignore them.
31 */
32 .pushsection ".exception_vector", "ax"
33 ldr pc, [pc, #24]
34 ldr pc, [pc, #24]
35 ldr pc, [pc, #24]
36 ldr pc, [pc, #24]
37 ldr pc, [pc, #24]
38 ldr pc, [pc, #24]
39 ldr pc, [pc, #24]
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