armv6: bit 2 (0x4) enables the dcache
This fixes a pretty simple typo.  Sadly, this still isn't enough to get
bcm2835 past mutex_enter.

@@ -170,11 +170,11 @@
         mcr     p15, 0, r0, c1, c0, 0
         SET_SIZE(armv6_icache_enable)
 
         ENTRY(armv6_dcache_enable)
         mrc     p15, 0, r0, c1, c0, 0
-        orr     r0, #0x2
+        orr     r0, #0x4
         mcr     p15, 0, r0, c1, c0, 0
         SET_SIZE(armv6_dcache_enable)
 
         ENTRY(armv6_icache_disable)
         mrc     p15, 0, r0, c1, c0, 0

@@ -182,11 +182,11 @@
         mcr     p15, 0, r0, c1, c0, 0
         SET_SIZE(armv6_icache_disable)
 
         ENTRY(armv6_dcache_disable)
         mrc     p15, 0, r0, c1, c0, 0
-        bic     r0, #0x2
+        bic     r0, #0x4
         mcr     p15, 0, r0, c1, c0, 0
         SET_SIZE(armv6_dcache_disable)
 
         ENTRY(armv6_icache_inval)
         mcr     p15, 0, r0, c7, c5, 0           @ Invalidate i-cache