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armv6: bit 2 (0x4) enables the dcache
This fixes a pretty simple typo. Sadly, this still isn't enough to get
bcm2835 past mutex_enter.
*** 57,67 ****
* We got here from _kobj_init() via exitto(). We have a few different
* tasks that we need to take care of before we hop into mlsetup and
* then main. We're never going back so we shouldn't feel compelled to
* preserve any registers.
*
- * o Enable unaligned access
* o Enable our I/D-caches
* o Save the boot syscalls and bootops for later
* o Set up our stack to be the real stack of t0stack.
* o Save t0 as curthread
* o Set up a struct REGS for mlsetup
--- 57,66 ----
*** 109,128 ****
*/
ldr r0, =t0
mcr p15, 0, r0, c13, c0, 4
/*
! * Go ahead now and enable unaligned access, the L1 I/D caches.
! *
! * Bit 2 is for the D cache
! * Bit 12 is for the I cache
! * Bit 22 is for unaligned access
*/
mrc p15, 0, r0, c1, c0, 0
! orr r0, #0x02
! orr r0, #0x1000
! orr r0, #0x400000
mcr p15, 0, r0, c1, c0, 0
/*
* mlsetup() takes the struct regs as an argument. main doesn't take
* any and should never return. Currently, we have an 8-byte aligned
--- 108,122 ----
*/
ldr r0, =t0
mcr p15, 0, r0, c13, c0, 4
/*
! * Go ahead now and enable the L1 I/D caches.
*/
mrc p15, 0, r0, c1, c0, 0
! orr r0, #0x04 /* D-cache */
! orr r0, #0x1000 /* I-cache */
mcr p15, 0, r0, c1, c0, 0
/*
* mlsetup() takes the struct regs as an argument. main doesn't take
* any and should never return. Currently, we have an 8-byte aligned