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armv6: bit 2 (0x4) enables the dcache
This fixes a pretty simple typo.  Sadly, this still isn't enough to get
bcm2835 past mutex_enter.

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          --- old/usr/src/uts/armv6/ml/glocore.s
          +++ new/usr/src/uts/armv6/ml/glocore.s
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  52   52  {}
  53   53  
  54   54  #else   /* __lint */
  55   55  
  56   56          /*
  57   57           * We got here from _kobj_init() via exitto().  We have a few different
  58   58           * tasks that we need to take care of before we hop into mlsetup and
  59   59           * then main. We're never going back so we shouldn't feel compelled to
  60   60           * preserve any registers.
  61   61           *
  62      -         *  o Enable unaligned access
  63   62           *  o Enable our I/D-caches
  64   63           *  o Save the boot syscalls and bootops for later
  65   64           *  o Set up our stack to be the real stack of t0stack.
  66   65           *  o Save t0 as curthread
  67   66           *  o Set up a struct REGS for mlsetup
  68   67           *  o Make sure that we're 8 byte aligned for the call
  69   68           */
  70   69  
  71   70          ENTRY(_locore_start)
  72   71  
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 104  103          ldr     r2, [r2]
 105  104          str     r1, [r2]
 106  105  
 107  106          /*
 108  107           * Set up our curthread pointer
 109  108           */
 110  109          ldr     r0, =t0
 111  110          mcr     p15, 0, r0, c13, c0, 4
 112  111  
 113  112          /*
 114      -         * Go ahead now and enable unaligned access, the L1 I/D caches.
 115      -         *
 116      -         * Bit 2 is for the D cache
 117      -         * Bit 12 is for the I cache
 118      -         * Bit 22 is for unaligned access
      113 +         * Go ahead now and enable the L1 I/D caches.  
 119  114           */
 120  115          mrc     p15, 0, r0, c1, c0, 0
 121      -        orr     r0, #0x02
 122      -        orr     r0, #0x1000
 123      -        orr     r0, #0x400000
      116 +        orr     r0, #0x04       /* D-cache */
      117 +        orr     r0, #0x1000     /* I-cache */
 124  118          mcr     p15, 0, r0, c1, c0, 0
 125  119  
 126  120          /*
 127  121           * mlsetup() takes the struct regs as an argument. main doesn't take
 128  122           * any and should never return. Currently, we have an 8-byte aligned
 129  123           * stack.  We want to push a zero frame pointer to terminate any
 130  124           * stack walking, but that would cause us to end up with only a
 131  125           * 4-byte aligned stack.  So, to keep things nice and correct, we
 132  126           * push a zero value twice - it's similar to a typical function
 133  127           * entry:
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