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armv6: simplify highvecs enabling code
Use the barrel shifter, Luke.
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--- old/usr/src/uts/armv6/ml/glocore.s
+++ new/usr/src/uts/armv6/ml/glocore.s
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 4 * You may only use this file in accordance with the terms of version
5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
10 10 */
11 11
12 12 /*
13 13 * Copyright 2013 (c) Joyent, Inc. All rights reserved.
14 14 * Copyright (c) 2015 Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
15 15 */
16 16
17 17 #include <sys/asm_linkage.h>
18 18 #include <sys/machparam.h>
19 19 #include <sys/cpu_asm.h>
20 20
21 21 #include "assym.h"
22 22
23 23 /*
24 24 * Every story needs a beginning. This is ours.
25 25 */
26 26
27 27 /*
28 28 * Each of the different machines has its own locore.s to take care of getting
29 29 * the machine specific setup done. Just before jumping into fakebop the
30 30 * first time, we call this machine specific code.
31 31 */
32 32
33 33 /*
34 34 * We are in a primordial world here. The loader is going to come along and
35 35 * boot us at _start. As we've started the world, we also need to set up a
36 36 * few things about us, for example our stack pointer. To help us out, it's
37 37 * useful to remember what the loader set up for us:
38 38 *
39 39 * - unaligned access are allowed (A = 0, U = 1)
40 40 * - virtual memory is enabled
41 41 * - we (unix) are mapped right were we want to be
42 42 * - a UART has been enabled & any memory mapped registers have been 1:1
43 43 * mapped
44 44 * - ATAGs have been updated to tell us what the mappings are
45 45 * - I/D L1 caches have been enabled
46 46 */
47 47
48 48 /*
49 49 * External globals
50 50 */
51 51 .globl _locore_start
52 52 .globl mlsetup
53 53 .globl sysp
54 54 .globl bootops
55 55 .globl bootopsp
56 56 .globl t0
57 57
58 58 .data
59 59 .comm t0stack, DEFAULTSTKSZ, 32
60 60 .comm t0, 4094, 32
61 61
62 62
63 63 /*
64 64 * Recall that _start is the traditional entry point for an ELF binary.
65 65 */
66 66 ENTRY(_start)
67 67 ldr sp, =t0stack
68 68 ldr r4, =DEFAULTSTKSZ
69 69 add sp, r4
70 70 bic sp, sp, #0xff
71 71
72 72 /*
73 73 * establish bogus stacks for exceptional CPU states, our exception
74 74 * code should never make use of these, and we want loud and violent
75 75 * failure should we accidentally try.
76 76 */
77 77 cps #(CPU_MODE_UND)
78 78 mov sp, #-1
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79 79 cps #(CPU_MODE_ABT)
80 80 mov sp, #-1
81 81 cps #(CPU_MODE_FIQ)
82 82 mov sp, #-1
83 83 cps #(CPU_MODE_IRQ)
84 84 mov sp, #-1
85 85 cps #(CPU_MODE_SVC)
86 86
87 87 /* Enable highvecs (moves the base of the exception vector) */
88 88 mrc p15, 0, r3, c1, c0, 0
89 - mov r4, #1
90 - lsl r4, r4, #13
91 - orr r3, r3, r4
89 + orr r3, r3, #(1 << 13)
92 90 mcr p15, 0, r3, c1, c0, 0
93 91
94 92 /* invoke machine specific setup */
95 93 bl _mach_start
96 94
97 95 bl _fakebop_start
98 96 SET_SIZE(_start)
99 97
100 98
101 99 #if defined(__lint)
102 100
103 101 /* ARGSUSED */
104 102 void
105 103 _locore_start(struct boot_syscalls *sysp, struct bootops *bop)
106 104 {}
107 105
108 106 #else /* __lint */
109 107
110 108 /*
111 109 * We got here from _kobj_init() via exitto(). We have a few different
112 110 * tasks that we need to take care of before we hop into mlsetup and
113 111 * then main. We're never going back so we shouldn't feel compelled to
114 112 * preserve any registers.
115 113 *
116 114 * o Enable our I/D-caches
117 115 * o Save the boot syscalls and bootops for later
118 116 * o Set up our stack to be the real stack of t0stack.
119 117 * o Save t0 as curthread
120 118 * o Set up a struct REGS for mlsetup
121 119 * o Make sure that we're 8 byte aligned for the call
122 120 */
123 121
124 122 ENTRY(_locore_start)
125 123
126 124
127 125 /*
128 126 * We've been running in t0stack anyway, up to this point, but
129 127 * _locore_start represents what is in effect a fresh start in the
130 128 * real kernel -- We'll never return back through here.
131 129 *
132 130 * So reclaim those few bytes
133 131 */
134 132 ldr sp, =t0stack
135 133 ldr r4, =(DEFAULTSTKSZ - REGSIZE)
136 134 add sp, r4
137 135 bic sp, sp, #0xff
138 136
139 137 /*
140 138 * Save flags and arguments for potential debugging
141 139 */
142 140 str r0, [sp, #REGOFF_R0]
143 141 str r1, [sp, #REGOFF_R1]
144 142 str r2, [sp, #REGOFF_R2]
145 143 str r3, [sp, #REGOFF_R3]
146 144 mrs r4, CPSR
147 145 str r4, [sp, #REGOFF_CPSR]
148 146
149 147 /*
150 148 * Save back the bootops and boot_syscalls.
151 149 */
152 150 ldr r2, =sysp
153 151 str r0, [r2]
154 152 ldr r2, =bootops
155 153 str r1, [r2]
156 154 ldr r2, =bootopsp
157 155 ldr r2, [r2]
158 156 str r1, [r2]
159 157
160 158 /*
161 159 * Set up our curthread pointer
162 160 */
163 161 ldr r0, =t0
164 162 mcr p15, 0, r0, c13, c0, 4
165 163
166 164 /*
167 165 * Go ahead now and enable the L1 I/D caches.
168 166 */
169 167 mrc p15, 0, r0, c1, c0, 0
170 168 orr r0, #0x04 /* D-cache */
171 169 orr r0, #0x1000 /* I-cache */
172 170 mcr p15, 0, r0, c1, c0, 0
173 171
174 172 /*
175 173 * mlsetup() takes the struct regs as an argument. main doesn't take
176 174 * any and should never return. Currently, we have an 8-byte aligned
177 175 * stack. We want to push a zero frame pointer to terminate any
178 176 * stack walking, but that would cause us to end up with only a
179 177 * 4-byte aligned stack. So, to keep things nice and correct, we
180 178 * push a zero value twice - it's similar to a typical function
181 179 * entry:
182 180 * push { r9, lr }
183 181 */
184 182 mov r9,#0
185 183 push { r9 } /* link register */
186 184 push { r9 } /* frame pointer */
187 185 mov r0, sp
188 186 bl mlsetup
189 187 bl main
190 188 /* NOTREACHED */
191 189 ldr r0,=__return_from_main
192 190 ldr r0,[r0]
193 191 bl panic
194 192 SET_SIZE(_locore_start)
195 193
196 194 __return_from_main:
197 195 .string "main() returned"
198 196 #endif /* __lint */
199 197
200 198 ENTRY(arm_reg_read)
201 199 ldr r0, [r0]
202 200 bx lr
203 201 SET_SIZE(arm_reg_read)
204 202
205 203 ENTRY(arm_reg_write)
206 204 str r1, [r0]
207 205 bx lr
208 206 SET_SIZE(arm_reg_write)
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