146 aim.aim_plen = 0x3000;
147 aim.aim_vlen = aim.aim_plen;
148 aim.aim_mapflags = PF_R | PF_X | PF_LOADER;
149 atag_append(chain, &aim.aim_header);
150 }
151
152 static void
153 fakeload_map_1mb(uintptr_t pa, uintptr_t va, int prot)
154 {
155 int entry;
156 armpte_t *pte;
157 arm_l1s_t *l1e;
158
159 entry = ARMPT_VADDR_TO_L1E(va);
160 pte = &pt_addr[entry];
161 if (ARMPT_L1E_ISVALID(*pte))
162 fakeload_panic("armboot_mmu: asked to map a mapped region!\n");
163 l1e = (arm_l1s_t *)pte;
164 *pte = 0;
165 l1e->al_type = ARMPT_L1_TYPE_SECT;
166 /* Assume it's not device memory */
167 l1e->al_bbit = 1;
168 l1e->al_cbit = 1;
169 l1e->al_tex = 1;
170 l1e->al_sbit = 1;
171
172 if (!(prot & PF_X))
173 l1e->al_xn = 1;
174 l1e->al_domain = 0;
175
176 if (prot & PF_W) {
177 l1e->al_ap2 = 1;
178 l1e->al_ap = 1;
179 } else {
180 l1e->al_ap2 = 0;
181 l1e->al_ap = 1;
182 }
183 l1e->al_ngbit = 0;
184 l1e->al_issuper = 0;
185 l1e->al_addr = ARMPT_PADDR_TO_L1SECT(pa);
186 }
187
188 /*
189 * Set freemem to be 1 MB aligned at the end of boot archive. While the L1 Page
190 * table only needs to be 16 KB aligned, we opt for 1 MB alignment so that way
|
146 aim.aim_plen = 0x3000;
147 aim.aim_vlen = aim.aim_plen;
148 aim.aim_mapflags = PF_R | PF_X | PF_LOADER;
149 atag_append(chain, &aim.aim_header);
150 }
151
152 static void
153 fakeload_map_1mb(uintptr_t pa, uintptr_t va, int prot)
154 {
155 int entry;
156 armpte_t *pte;
157 arm_l1s_t *l1e;
158
159 entry = ARMPT_VADDR_TO_L1E(va);
160 pte = &pt_addr[entry];
161 if (ARMPT_L1E_ISVALID(*pte))
162 fakeload_panic("armboot_mmu: asked to map a mapped region!\n");
163 l1e = (arm_l1s_t *)pte;
164 *pte = 0;
165 l1e->al_type = ARMPT_L1_TYPE_SECT;
166
167 if (prot & PF_DEVICE) {
168 l1e->al_bbit = 1;
169 l1e->al_cbit = 0;
170 l1e->al_tex = 0;
171 l1e->al_sbit = 1;
172 } else {
173 l1e->al_bbit = 1;
174 l1e->al_cbit = 1;
175 l1e->al_tex = 1;
176 l1e->al_sbit = 1;
177 }
178
179 if (!(prot & PF_X))
180 l1e->al_xn = 1;
181 l1e->al_domain = 0;
182
183 if (prot & PF_W) {
184 l1e->al_ap2 = 1;
185 l1e->al_ap = 1;
186 } else {
187 l1e->al_ap2 = 0;
188 l1e->al_ap = 1;
189 }
190 l1e->al_ngbit = 0;
191 l1e->al_issuper = 0;
192 l1e->al_addr = ARMPT_PADDR_TO_L1SECT(pa);
193 }
194
195 /*
196 * Set freemem to be 1 MB aligned at the end of boot archive. While the L1 Page
197 * table only needs to be 16 KB aligned, we opt for 1 MB alignment so that way
|