396 { "386", SS11, { "-march=i386" } },
397 { "pentium_pro", SS11, { "-march=pentiumpro" } },
398 { "sse", SS11, { "-msse", "-mfpmath=sse" } },
399 { "sse2", SS11, { "-msse2", "-mfpmath=sse" } },
400 #elif defined(CW_TARGET_sparc)
401 { "generic", (SS11|M32), { "-m32", "-mcpu=v8" } },
402 { "generic64", (SS11|M64), { "-m64", "-mcpu=v9" } },
403 { "v8", (SS11|M32), { "-m32", "-mcpu=v8", "-mno-v8plus" } },
404 { "v8plus", (SS11|M32), { "-m32", "-mcpu=v9", "-mv8plus" } },
405 { "v8plusa", (SS11|M32), { "-m32", "-mcpu=ultrasparc", "-mv8plus",
406 "-mvis" } },
407 { "v8plusb", (SS11|M32), { "-m32", "-mcpu=ultrasparc3", "-mv8plus",
408 "-mvis" } },
409 { "v9", (SS11|M64), { "-m64", "-mcpu=v9" } },
410 { "v9a", (SS11|M64), { "-m64", "-mcpu=ultrasparc", "-mvis" } },
411 { "v9b", (SS11|M64), { "-m64", "-mcpu=ultrasparc3", "-mvis" } },
412 { "sparc", SS12, { "-mcpu=v9", "-mv8plus" } },
413 { "sparcvis", SS12, { "-mcpu=ultrasparc", "-mvis" } },
414 { "sparcvis2", SS12, { "-mcpu=ultrasparc3", "-mvis" } }
415 #elif defined(CW_TARGET_arm)
416 { "generic", SS12, { "-march=armv6", "-mfpu=vfp", "-mhard-float" } }
417 #else
418 #error Unknown CW_TARGET
419 #endif
420 };
421
422 static int xtbl_size = sizeof (xtbl) / sizeof (xarch_table_t);
423
424 static const char *progname;
425
426 static const char *xchip_tbl[] = {
427 #if defined(CW_TARGET_i386)
428 "386", "-mtune=i386", NULL,
429 "486", "-mtune=i486", NULL,
430 "pentium", "-mtune=pentium", NULL,
431 "pentium_pro", "-mtune=pentiumpro", NULL,
432 #elif defined(CW_TARGET_sparc)
433 "super", "-mtune=supersparc", NULL,
434 "ultra", "-mtune=ultrasparc", NULL,
435 "ultra3", "-mtune=ultrasparc3", NULL,
436 #endif
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396 { "386", SS11, { "-march=i386" } },
397 { "pentium_pro", SS11, { "-march=pentiumpro" } },
398 { "sse", SS11, { "-msse", "-mfpmath=sse" } },
399 { "sse2", SS11, { "-msse2", "-mfpmath=sse" } },
400 #elif defined(CW_TARGET_sparc)
401 { "generic", (SS11|M32), { "-m32", "-mcpu=v8" } },
402 { "generic64", (SS11|M64), { "-m64", "-mcpu=v9" } },
403 { "v8", (SS11|M32), { "-m32", "-mcpu=v8", "-mno-v8plus" } },
404 { "v8plus", (SS11|M32), { "-m32", "-mcpu=v9", "-mv8plus" } },
405 { "v8plusa", (SS11|M32), { "-m32", "-mcpu=ultrasparc", "-mv8plus",
406 "-mvis" } },
407 { "v8plusb", (SS11|M32), { "-m32", "-mcpu=ultrasparc3", "-mv8plus",
408 "-mvis" } },
409 { "v9", (SS11|M64), { "-m64", "-mcpu=v9" } },
410 { "v9a", (SS11|M64), { "-m64", "-mcpu=ultrasparc", "-mvis" } },
411 { "v9b", (SS11|M64), { "-m64", "-mcpu=ultrasparc3", "-mvis" } },
412 { "sparc", SS12, { "-mcpu=v9", "-mv8plus" } },
413 { "sparcvis", SS12, { "-mcpu=ultrasparc", "-mvis" } },
414 { "sparcvis2", SS12, { "-mcpu=ultrasparc3", "-mvis" } }
415 #elif defined(CW_TARGET_arm)
416 { "generic", SS12, { "-march=armv7-a", "-mfpu=vfpv3-d16", "-mhard-float" } }
417 #else
418 #error Unknown CW_TARGET
419 #endif
420 };
421
422 static int xtbl_size = sizeof (xtbl) / sizeof (xarch_table_t);
423
424 static const char *progname;
425
426 static const char *xchip_tbl[] = {
427 #if defined(CW_TARGET_i386)
428 "386", "-mtune=i386", NULL,
429 "486", "-mtune=i486", NULL,
430 "pentium", "-mtune=pentium", NULL,
431 "pentium_pro", "-mtune=pentiumpro", NULL,
432 #elif defined(CW_TARGET_sparc)
433 "super", "-mtune=supersparc", NULL,
434 "ultra", "-mtune=ultrasparc", NULL,
435 "ultra3", "-mtune=ultrasparc3", NULL,
436 #endif
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