103 * the support infrastructure for various hardware features has been
104 * initialized. It determines which processor features will be reported
105 * to userland via the aux vector.
106 *
107 * All passes are executed on all CPUs, but only the boot CPU determines what
108 * features the kernel will use.
109 *
110 * Much of the worst junk in this file is for the support of processors
111 * that didn't really implement the cpuid instruction properly.
112 *
113 * NOTE: The accessor functions (cpuid_get*) are aware of, and ASSERT upon,
114 * the pass numbers. Accordingly, changes to the pass code may require changes
115 * to the accessor code.
116 */
117
118 uint_t x86_vendor = X86_VENDOR_IntelClone;
119 uint_t x86_type = X86_TYPE_OTHER;
120 uint_t x86_clflush_size = 0;
121
122 uint_t pentiumpro_bug4046376;
123 uint_t pentiumpro_bug4064495;
124
125 uchar_t x86_featureset[BT_SIZEOFMAP(NUM_X86_FEATURES)];
126
127 static char *x86_feature_names[NUM_X86_FEATURES] = {
128 "lgpg",
129 "tsc",
130 "msr",
131 "mtrr",
132 "pge",
133 "de",
134 "cmov",
135 "mmx",
136 "mca",
137 "pae",
138 "cv8",
139 "pat",
140 "sep",
141 "sse",
142 "sse2",
143 "htt",
197 if (memcmp(setA, setB, BT_SIZEOFMAP(NUM_X86_FEATURES)) == 0) {
198 return (B_TRUE);
199 } else {
200 return (B_FALSE);
201 }
202 }
203
204 void
205 print_x86_featureset(void *featureset)
206 {
207 uint_t i;
208
209 for (i = 0; i < NUM_X86_FEATURES; i++) {
210 if (is_x86_feature(featureset, i)) {
211 cmn_err(CE_CONT, "?x86_feature: %s\n",
212 x86_feature_names[i]);
213 }
214 }
215 }
216
217 uint_t enable486;
218
219 static size_t xsave_state_size = 0;
220 uint64_t xsave_bv_all = (XFEATURE_LEGACY_FP | XFEATURE_SSE);
221 boolean_t xsave_force_disable = B_FALSE;
222
223 /*
224 * This is set to platform type we are running on.
225 */
226 static int platform_type = -1;
227
228 #if !defined(__xpv)
229 /*
230 * Variable to patch if hypervisor platform detection needs to be
231 * disabled (e.g. platform_type will always be HW_NATIVE if this is 0).
232 */
233 int enable_platform_detection = 1;
234 #endif
235
236 /*
237 * monitor/mwait info.
238 *
1016 cpi->cpi_brandid = CPI_BRANDID(cpi);
1017
1018 /*
1019 * *default* assumptions:
1020 * - believe %edx feature word
1021 * - ignore %ecx feature word
1022 * - 32-bit virtual and physical addressing
1023 */
1024 mask_edx = 0xffffffff;
1025 mask_ecx = 0;
1026
1027 cpi->cpi_pabits = cpi->cpi_vabits = 32;
1028
1029 switch (cpi->cpi_vendor) {
1030 case X86_VENDOR_Intel:
1031 if (cpi->cpi_family == 5)
1032 x86_type = X86_TYPE_P5;
1033 else if (IS_LEGACY_P6(cpi)) {
1034 x86_type = X86_TYPE_P6;
1035 pentiumpro_bug4046376 = 1;
1036 pentiumpro_bug4064495 = 1;
1037 /*
1038 * Clear the SEP bit when it was set erroneously
1039 */
1040 if (cpi->cpi_model < 3 && cpi->cpi_step < 3)
1041 cp->cp_edx &= ~CPUID_INTC_EDX_SEP;
1042 } else if (IS_NEW_F6(cpi) || cpi->cpi_family == 0xf) {
1043 x86_type = X86_TYPE_P4;
1044 /*
1045 * We don't currently depend on any of the %ecx
1046 * features until Prescott, so we'll only check
1047 * this from P4 onwards. We might want to revisit
1048 * that idea later.
1049 */
1050 mask_ecx = 0xffffffff;
1051 } else if (cpi->cpi_family > 0xf)
1052 mask_ecx = 0xffffffff;
1053 /*
1054 * We don't support MONITOR/MWAIT if leaf 5 is not available
1055 * to obtain the monitor linesize.
1056 */
|
103 * the support infrastructure for various hardware features has been
104 * initialized. It determines which processor features will be reported
105 * to userland via the aux vector.
106 *
107 * All passes are executed on all CPUs, but only the boot CPU determines what
108 * features the kernel will use.
109 *
110 * Much of the worst junk in this file is for the support of processors
111 * that didn't really implement the cpuid instruction properly.
112 *
113 * NOTE: The accessor functions (cpuid_get*) are aware of, and ASSERT upon,
114 * the pass numbers. Accordingly, changes to the pass code may require changes
115 * to the accessor code.
116 */
117
118 uint_t x86_vendor = X86_VENDOR_IntelClone;
119 uint_t x86_type = X86_TYPE_OTHER;
120 uint_t x86_clflush_size = 0;
121
122 uint_t pentiumpro_bug4046376;
123
124 uchar_t x86_featureset[BT_SIZEOFMAP(NUM_X86_FEATURES)];
125
126 static char *x86_feature_names[NUM_X86_FEATURES] = {
127 "lgpg",
128 "tsc",
129 "msr",
130 "mtrr",
131 "pge",
132 "de",
133 "cmov",
134 "mmx",
135 "mca",
136 "pae",
137 "cv8",
138 "pat",
139 "sep",
140 "sse",
141 "sse2",
142 "htt",
196 if (memcmp(setA, setB, BT_SIZEOFMAP(NUM_X86_FEATURES)) == 0) {
197 return (B_TRUE);
198 } else {
199 return (B_FALSE);
200 }
201 }
202
203 void
204 print_x86_featureset(void *featureset)
205 {
206 uint_t i;
207
208 for (i = 0; i < NUM_X86_FEATURES; i++) {
209 if (is_x86_feature(featureset, i)) {
210 cmn_err(CE_CONT, "?x86_feature: %s\n",
211 x86_feature_names[i]);
212 }
213 }
214 }
215
216 static size_t xsave_state_size = 0;
217 uint64_t xsave_bv_all = (XFEATURE_LEGACY_FP | XFEATURE_SSE);
218 boolean_t xsave_force_disable = B_FALSE;
219
220 /*
221 * This is set to platform type we are running on.
222 */
223 static int platform_type = -1;
224
225 #if !defined(__xpv)
226 /*
227 * Variable to patch if hypervisor platform detection needs to be
228 * disabled (e.g. platform_type will always be HW_NATIVE if this is 0).
229 */
230 int enable_platform_detection = 1;
231 #endif
232
233 /*
234 * monitor/mwait info.
235 *
1013 cpi->cpi_brandid = CPI_BRANDID(cpi);
1014
1015 /*
1016 * *default* assumptions:
1017 * - believe %edx feature word
1018 * - ignore %ecx feature word
1019 * - 32-bit virtual and physical addressing
1020 */
1021 mask_edx = 0xffffffff;
1022 mask_ecx = 0;
1023
1024 cpi->cpi_pabits = cpi->cpi_vabits = 32;
1025
1026 switch (cpi->cpi_vendor) {
1027 case X86_VENDOR_Intel:
1028 if (cpi->cpi_family == 5)
1029 x86_type = X86_TYPE_P5;
1030 else if (IS_LEGACY_P6(cpi)) {
1031 x86_type = X86_TYPE_P6;
1032 pentiumpro_bug4046376 = 1;
1033 /*
1034 * Clear the SEP bit when it was set erroneously
1035 */
1036 if (cpi->cpi_model < 3 && cpi->cpi_step < 3)
1037 cp->cp_edx &= ~CPUID_INTC_EDX_SEP;
1038 } else if (IS_NEW_F6(cpi) || cpi->cpi_family == 0xf) {
1039 x86_type = X86_TYPE_P4;
1040 /*
1041 * We don't currently depend on any of the %ecx
1042 * features until Prescott, so we'll only check
1043 * this from P4 onwards. We might want to revisit
1044 * that idea later.
1045 */
1046 mask_ecx = 0xffffffff;
1047 } else if (cpi->cpi_family > 0xf)
1048 mask_ecx = 0xffffffff;
1049 /*
1050 * We don't support MONITOR/MWAIT if leaf 5 is not available
1051 * to obtain the monitor linesize.
1052 */
|