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5045 use atomic_{inc,dec}_* instead of atomic_add_*


 336         (((uint32_t *)(addr1))[3] == ((uint32_t *)(addr2))[3] && \
 337         ((uint32_t *)(addr1))[2] == ((uint32_t *)(addr2))[2] && \
 338         ((uint32_t *)(addr1))[1] == ((uint32_t *)(addr2))[1])))
 339 #define IPSA_COPY_ADDR(dstaddr, srcaddr, fam) { \
 340         ((uint32_t *)(dstaddr))[0] = ((uint32_t *)(srcaddr))[0]; \
 341         if ((fam) == AF_INET6) {\
 342                 ((uint32_t *)(dstaddr))[1] = ((uint32_t *)(srcaddr))[1]; \
 343                 ((uint32_t *)(dstaddr))[2] = ((uint32_t *)(srcaddr))[2]; \
 344                 ((uint32_t *)(dstaddr))[3] = ((uint32_t *)(srcaddr))[3]; } }
 345 
 346 /*
 347  * ipsa_t reference hold/release macros.
 348  *
 349  * If you have a pointer, you REFHOLD.  If you are releasing a pointer, you
 350  * REFRELE.  An ipsa_t that is newly inserted into the table should have
 351  * a reference count of 1 (for the table's pointer), plus 1 more for every
 352  * pointer that is referencing the ipsa_t.
 353  */
 354 
 355 #define IPSA_REFHOLD(ipsa) {                    \
 356         atomic_add_32(&(ipsa)->ipsa_refcnt, 1);  \
 357         ASSERT((ipsa)->ipsa_refcnt != 0);    \
 358 }
 359 
 360 /*
 361  * Decrement the reference count on the SA.
 362  * In architectures e.g sun4u, where atomic_add_32_nv is just
 363  * a cas, we need to maintain the right memory barrier semantics
 364  * as that of mutex_exit i.e all the loads and stores should complete
 365  * before the cas is executed. membar_exit() does that here.
 366  */
 367 
 368 #define IPSA_REFRELE(ipsa) {                                    \
 369         ASSERT((ipsa)->ipsa_refcnt != 0);                    \
 370         membar_exit();                                          \
 371         if (atomic_add_32_nv(&(ipsa)->ipsa_refcnt, -1) == 0)     \
 372                 ((ipsa)->ipsa_freefunc)(ipsa);                       \
 373 }
 374 
 375 /*
 376  * Security association hash macros and definitions.  For now, assume the
 377  * IPsec model, and hash outbounds on destination address, and inbounds on
 378  * SPI.
 379  */
 380 
 381 #define IPSEC_DEFAULT_HASH_SIZE 256
 382 
 383 #define INBOUND_HASH(sadb, spi) ((spi) % ((sadb)->sdb_hashsize))
 384 #define OUTBOUND_HASH_V4(sadb, v4addr) ((v4addr) % ((sadb)->sdb_hashsize))
 385 #define OUTBOUND_HASH_V6(sadb, v6addr) OUTBOUND_HASH_V4((sadb), \
 386         (*(uint32_t *)&(v6addr)) ^ (*(((uint32_t *)&(v6addr)) + 1)) ^ \
 387         (*(((uint32_t *)&(v6addr)) + 2)) ^ (*(((uint32_t *)&(v6addr)) + 3)))
 388 
 389 /*
 390  * Syntactic sugar to find the appropriate hash bucket directly.
 391  */




 336         (((uint32_t *)(addr1))[3] == ((uint32_t *)(addr2))[3] && \
 337         ((uint32_t *)(addr1))[2] == ((uint32_t *)(addr2))[2] && \
 338         ((uint32_t *)(addr1))[1] == ((uint32_t *)(addr2))[1])))
 339 #define IPSA_COPY_ADDR(dstaddr, srcaddr, fam) { \
 340         ((uint32_t *)(dstaddr))[0] = ((uint32_t *)(srcaddr))[0]; \
 341         if ((fam) == AF_INET6) {\
 342                 ((uint32_t *)(dstaddr))[1] = ((uint32_t *)(srcaddr))[1]; \
 343                 ((uint32_t *)(dstaddr))[2] = ((uint32_t *)(srcaddr))[2]; \
 344                 ((uint32_t *)(dstaddr))[3] = ((uint32_t *)(srcaddr))[3]; } }
 345 
 346 /*
 347  * ipsa_t reference hold/release macros.
 348  *
 349  * If you have a pointer, you REFHOLD.  If you are releasing a pointer, you
 350  * REFRELE.  An ipsa_t that is newly inserted into the table should have
 351  * a reference count of 1 (for the table's pointer), plus 1 more for every
 352  * pointer that is referencing the ipsa_t.
 353  */
 354 
 355 #define IPSA_REFHOLD(ipsa) {                    \
 356         atomic_inc_32(&(ipsa)->ipsa_refcnt);     \
 357         ASSERT((ipsa)->ipsa_refcnt != 0);    \
 358 }
 359 
 360 /*
 361  * Decrement the reference count on the SA.
 362  * In architectures e.g sun4u, where atomic_add_32_nv is just
 363  * a cas, we need to maintain the right memory barrier semantics
 364  * as that of mutex_exit i.e all the loads and stores should complete
 365  * before the cas is executed. membar_exit() does that here.
 366  */
 367 
 368 #define IPSA_REFRELE(ipsa) {                                    \
 369         ASSERT((ipsa)->ipsa_refcnt != 0);                    \
 370         membar_exit();                                          \
 371         if (atomic_dec_32_nv(&(ipsa)->ipsa_refcnt) == 0) \
 372                 ((ipsa)->ipsa_freefunc)(ipsa);                       \
 373 }
 374 
 375 /*
 376  * Security association hash macros and definitions.  For now, assume the
 377  * IPsec model, and hash outbounds on destination address, and inbounds on
 378  * SPI.
 379  */
 380 
 381 #define IPSEC_DEFAULT_HASH_SIZE 256
 382 
 383 #define INBOUND_HASH(sadb, spi) ((spi) % ((sadb)->sdb_hashsize))
 384 #define OUTBOUND_HASH_V4(sadb, v4addr) ((v4addr) % ((sadb)->sdb_hashsize))
 385 #define OUTBOUND_HASH_V6(sadb, v6addr) OUTBOUND_HASH_V4((sadb), \
 386         (*(uint32_t *)&(v6addr)) ^ (*(((uint32_t *)&(v6addr)) + 1)) ^ \
 387         (*(((uint32_t *)&(v6addr)) + 2)) ^ (*(((uint32_t *)&(v6addr)) + 3)))
 388 
 389 /*
 390  * Syntactic sugar to find the appropriate hash bucket directly.
 391  */