9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
24 */
25
26 #ifndef _VM_HTABLE_H
27 #define _VM_HTABLE_H
28
29 #pragma ident "%Z%%M% %I% %E% SMI"
30
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34
35 #if defined(__GNUC__) && defined(_ASM_INLINES) && defined(_KERNEL)
36 #include <asm/htable.h>
37 #endif
38
39 extern void atomic_andb(uint8_t *addr, uint8_t value);
40 extern void atomic_orb(uint8_t *addr, uint8_t value);
41 extern void atomic_inc16(uint16_t *addr);
42 extern void atomic_dec16(uint16_t *addr);
43 extern void mmu_tlbflush_entry(caddr_t addr);
44
45 /*
46 * Each hardware page table has an htable_t describing it.
47 *
48 * We use a reference counter mechanism to detect when we can free an htable.
49 * In the implmentation the reference count is split into 2 separate counters:
50 *
275 extern x86pte_t x86pte_inval(htable_t *ht, uint_t entry,
276 x86pte_t old, x86pte_t *ptr);
277
278 extern x86pte_t x86pte_update(htable_t *ht, uint_t entry,
279 x86pte_t old, x86pte_t new);
280
281 extern void x86pte_copy(htable_t *src, htable_t *dest, uint_t entry,
282 uint_t cnt);
283
284 /*
285 * access to a pagetable knowing only the pfn
286 */
287 extern x86pte_t *x86pte_mapin(pfn_t, uint_t, htable_t *);
288 extern void x86pte_mapout(void);
289
290 /*
291 * these are actually inlines for "lock; incw", "lock; decw", etc. instructions.
292 */
293 #define HTABLE_INC(x) atomic_inc16((uint16_t *)&x)
294 #define HTABLE_DEC(x) atomic_dec16((uint16_t *)&x)
295 #define HTABLE_LOCK_INC(ht) atomic_add_32(&(ht)->ht_lock_cnt, 1)
296 #define HTABLE_LOCK_DEC(ht) atomic_add_32(&(ht)->ht_lock_cnt, -1)
297
298 #ifdef __xpv
299 extern void xen_flush_va(caddr_t va);
300 extern void xen_gflush_va(caddr_t va, cpuset_t);
301 extern void xen_flush_tlb(void);
302 extern void xen_gflush_tlb(cpuset_t);
303 extern void xen_pin(pfn_t, level_t);
304 extern void xen_unpin(pfn_t);
305 extern int xen_kpm_page(pfn_t, uint_t);
306
307 /*
308 * The hypervisor maps all page tables into our address space read-only.
309 * Under normal circumstances, the hypervisor then handles all updates to
310 * the page tables underneath the covers for us. However, when we are
311 * trying to dump core after a hypervisor panic, the hypervisor is no
312 * longer available to do these updates. To work around the protection
313 * problem, we simply disable write-protect checking for the duration of a
314 * pagetable update operation.
315 */
316 #define XPV_ALLOW_PAGETABLE_UPDATES() \
|
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21 /*
22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
24 */
25
26 #ifndef _VM_HTABLE_H
27 #define _VM_HTABLE_H
28
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32
33 #if defined(__GNUC__) && defined(_ASM_INLINES) && defined(_KERNEL)
34 #include <asm/htable.h>
35 #endif
36
37 extern void atomic_andb(uint8_t *addr, uint8_t value);
38 extern void atomic_orb(uint8_t *addr, uint8_t value);
39 extern void atomic_inc16(uint16_t *addr);
40 extern void atomic_dec16(uint16_t *addr);
41 extern void mmu_tlbflush_entry(caddr_t addr);
42
43 /*
44 * Each hardware page table has an htable_t describing it.
45 *
46 * We use a reference counter mechanism to detect when we can free an htable.
47 * In the implmentation the reference count is split into 2 separate counters:
48 *
273 extern x86pte_t x86pte_inval(htable_t *ht, uint_t entry,
274 x86pte_t old, x86pte_t *ptr);
275
276 extern x86pte_t x86pte_update(htable_t *ht, uint_t entry,
277 x86pte_t old, x86pte_t new);
278
279 extern void x86pte_copy(htable_t *src, htable_t *dest, uint_t entry,
280 uint_t cnt);
281
282 /*
283 * access to a pagetable knowing only the pfn
284 */
285 extern x86pte_t *x86pte_mapin(pfn_t, uint_t, htable_t *);
286 extern void x86pte_mapout(void);
287
288 /*
289 * these are actually inlines for "lock; incw", "lock; decw", etc. instructions.
290 */
291 #define HTABLE_INC(x) atomic_inc16((uint16_t *)&x)
292 #define HTABLE_DEC(x) atomic_dec16((uint16_t *)&x)
293 #define HTABLE_LOCK_INC(ht) atomic_inc_32(&(ht)->ht_lock_cnt)
294 #define HTABLE_LOCK_DEC(ht) atomic_dec_32(&(ht)->ht_lock_cnt)
295
296 #ifdef __xpv
297 extern void xen_flush_va(caddr_t va);
298 extern void xen_gflush_va(caddr_t va, cpuset_t);
299 extern void xen_flush_tlb(void);
300 extern void xen_gflush_tlb(cpuset_t);
301 extern void xen_pin(pfn_t, level_t);
302 extern void xen_unpin(pfn_t);
303 extern int xen_kpm_page(pfn_t, uint_t);
304
305 /*
306 * The hypervisor maps all page tables into our address space read-only.
307 * Under normal circumstances, the hypervisor then handles all updates to
308 * the page tables underneath the covers for us. However, when we are
309 * trying to dump core after a hypervisor panic, the hypervisor is no
310 * longer available to do these updates. To work around the protection
311 * problem, we simply disable write-protect checking for the duration of a
312 * pagetable update operation.
313 */
314 #define XPV_ALLOW_PAGETABLE_UPDATES() \
|