234 * We never called xen_uppc_addspl() when the SCI
235 * interrupt was added because that happened before the
236 * PSM module was loaded. Fix that up here by doing
237 * any missed operations (e.g. bind to CPU)
238 */
239 if ((irqno = xen_uppc_sci) >= 0) {
240 ec_enable_irq(irqno);
241 }
242 }
243 }
244
245
246 /*ARGSUSED*/
247 static int
248 xen_uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl)
249 {
250 int ret = PSM_SUCCESS;
251 cpuset_t cpus;
252
253 if (irqno >= 0 && irqno <= MAX_ISA_IRQ)
254 atomic_add_16(&xen_uppc_irq_shared_table[irqno], 1);
255
256 /*
257 * We are called at splhi() so we can't call anything that might end
258 * up trying to context switch.
259 */
260 if (irqno >= PIRQ_BASE && irqno < NR_PIRQS &&
261 DOMAIN_IS_INITDOMAIN(xen_info)) {
262 CPUSET_ZERO(cpus);
263 CPUSET_ADD(cpus, 0);
264 ec_setup_pirq(irqno, ipl, &cpus);
265 } else {
266 /*
267 * Set priority/affinity/enable for non PIRQs
268 */
269 ret = ec_set_irq_priority(irqno, ipl);
270 ASSERT(ret == 0);
271 CPUSET_ZERO(cpus);
272 CPUSET_ADD(cpus, 0);
273 ec_set_irq_affinity(irqno, cpus);
274 ec_enable_irq(irqno);
275 }
276
277 return (ret);
278 }
279
280 /*ARGSUSED*/
281 static int
282 xen_uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl)
283 {
284 int err = PSM_SUCCESS;
285
286 if (irqno >= 0 && irqno <= MAX_ISA_IRQ)
287 atomic_add_16(&xen_uppc_irq_shared_table[irqno], -1);
288
289 if (irqno >= PIRQ_BASE && irqno < NR_PIRQS &&
290 DOMAIN_IS_INITDOMAIN(xen_info)) {
291 if (max_ipl == PSM_INVALID_IPL) {
292 /*
293 * unbind if no more sharers of this irq/evtchn
294 */
295 (void) ec_block_irq(irqno);
296 ec_unbind_irq(irqno);
297 } else {
298 /*
299 * If still in use reset priority
300 */
301 err = ec_set_irq_priority(irqno, max_ipl);
302 }
303 } else {
304 (void) ec_block_irq(irqno);
305 ec_unbind_irq(irqno);
306 }
307 return (err);
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234 * We never called xen_uppc_addspl() when the SCI
235 * interrupt was added because that happened before the
236 * PSM module was loaded. Fix that up here by doing
237 * any missed operations (e.g. bind to CPU)
238 */
239 if ((irqno = xen_uppc_sci) >= 0) {
240 ec_enable_irq(irqno);
241 }
242 }
243 }
244
245
246 /*ARGSUSED*/
247 static int
248 xen_uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl)
249 {
250 int ret = PSM_SUCCESS;
251 cpuset_t cpus;
252
253 if (irqno >= 0 && irqno <= MAX_ISA_IRQ)
254 atomic_inc_16(&xen_uppc_irq_shared_table[irqno]);
255
256 /*
257 * We are called at splhi() so we can't call anything that might end
258 * up trying to context switch.
259 */
260 if (irqno >= PIRQ_BASE && irqno < NR_PIRQS &&
261 DOMAIN_IS_INITDOMAIN(xen_info)) {
262 CPUSET_ZERO(cpus);
263 CPUSET_ADD(cpus, 0);
264 ec_setup_pirq(irqno, ipl, &cpus);
265 } else {
266 /*
267 * Set priority/affinity/enable for non PIRQs
268 */
269 ret = ec_set_irq_priority(irqno, ipl);
270 ASSERT(ret == 0);
271 CPUSET_ZERO(cpus);
272 CPUSET_ADD(cpus, 0);
273 ec_set_irq_affinity(irqno, cpus);
274 ec_enable_irq(irqno);
275 }
276
277 return (ret);
278 }
279
280 /*ARGSUSED*/
281 static int
282 xen_uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl)
283 {
284 int err = PSM_SUCCESS;
285
286 if (irqno >= 0 && irqno <= MAX_ISA_IRQ)
287 atomic_dec_16(&xen_uppc_irq_shared_table[irqno]);
288
289 if (irqno >= PIRQ_BASE && irqno < NR_PIRQS &&
290 DOMAIN_IS_INITDOMAIN(xen_info)) {
291 if (max_ipl == PSM_INVALID_IPL) {
292 /*
293 * unbind if no more sharers of this irq/evtchn
294 */
295 (void) ec_block_irq(irqno);
296 ec_unbind_irq(irqno);
297 } else {
298 /*
299 * If still in use reset priority
300 */
301 err = ec_set_irq_priority(irqno, max_ipl);
302 }
303 } else {
304 (void) ec_block_irq(irqno);
305 ec_unbind_irq(irqno);
306 }
307 return (err);
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