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5253 kmem_alloc/kmem_zalloc won't fail with KM_SLEEP
5254 getrbuf won't fail with KM_SLEEP


3107         uhci_state_t            *uhcip,
3108         uint_t                  num_tds,
3109         uhci_bulk_isoc_xfer_t   *info)
3110 {
3111         int                     result, i, j, err;
3112         size_t                  real_length;
3113         uint_t                  ccount, num;
3114         ddi_device_acc_attr_t   dev_attr;
3115         uhci_bulk_isoc_td_pool_t *td_pool_ptr1, *td_pool_ptr2;
3116 
3117         USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
3118             "uhci_alloc_memory_for_tds: num_tds: 0x%x info: 0x%p "
3119             "num_pools: %u", num_tds, (void *)info, info->num_pools);
3120 
3121         /* The host controller will be little endian */
3122         dev_attr.devacc_attr_version            = DDI_DEVICE_ATTR_V0;
3123         dev_attr.devacc_attr_endian_flags       = DDI_STRUCTURE_LE_ACC;
3124         dev_attr.devacc_attr_dataorder          = DDI_STRICTORDER_ACC;
3125 
3126         /* Allocate the TD pool structures */
3127         if ((info->td_pools = kmem_zalloc(
3128             (sizeof (uhci_bulk_isoc_td_pool_t) * info->num_pools),
3129             KM_SLEEP)) == NULL) {
3130                 USB_DPRINTF_L2(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
3131                     "uhci_alloc_memory_for_tds: alloc td_pools failed");
3132 
3133                 return (USB_FAILURE);
3134         }
3135 
3136         for (i = 0; i < info->num_pools; i++) {
3137                 if (info->num_pools == 1) {
3138                         num = num_tds;
3139                 } else if (i < (info->num_pools - 1)) {
3140                         num = UHCI_MAX_TD_NUM_PER_POOL;
3141                 } else {
3142                         num = (num_tds % UHCI_MAX_TD_NUM_PER_POOL);
3143                 }
3144 
3145                 td_pool_ptr1 = &info->td_pools[i];
3146 
3147                 /* Allocate the bulk TD pool DMA handle */
3148                 if (ddi_dma_alloc_handle(uhcip->uhci_dip,
3149                     &uhcip->uhci_dma_attr, DDI_DMA_SLEEP, 0,
3150                     &td_pool_ptr1->dma_handle) != DDI_SUCCESS) {
3151 
3152                         for (j = 0; j < i; j++) {
3153                                 td_pool_ptr2 = &info->td_pools[j];
3154                                 result = ddi_dma_unbind_handle(




3107         uhci_state_t            *uhcip,
3108         uint_t                  num_tds,
3109         uhci_bulk_isoc_xfer_t   *info)
3110 {
3111         int                     result, i, j, err;
3112         size_t                  real_length;
3113         uint_t                  ccount, num;
3114         ddi_device_acc_attr_t   dev_attr;
3115         uhci_bulk_isoc_td_pool_t *td_pool_ptr1, *td_pool_ptr2;
3116 
3117         USB_DPRINTF_L4(PRINT_MASK_ATTA, uhcip->uhci_log_hdl,
3118             "uhci_alloc_memory_for_tds: num_tds: 0x%x info: 0x%p "
3119             "num_pools: %u", num_tds, (void *)info, info->num_pools);
3120 
3121         /* The host controller will be little endian */
3122         dev_attr.devacc_attr_version            = DDI_DEVICE_ATTR_V0;
3123         dev_attr.devacc_attr_endian_flags       = DDI_STRUCTURE_LE_ACC;
3124         dev_attr.devacc_attr_dataorder          = DDI_STRICTORDER_ACC;
3125 
3126         /* Allocate the TD pool structures */
3127         info->td_pools = kmem_zalloc((sizeof (uhci_bulk_isoc_td_pool_t) *
3128             info->num_pools), KM_SLEEP);






3129 
3130         for (i = 0; i < info->num_pools; i++) {
3131                 if (info->num_pools == 1) {
3132                         num = num_tds;
3133                 } else if (i < (info->num_pools - 1)) {
3134                         num = UHCI_MAX_TD_NUM_PER_POOL;
3135                 } else {
3136                         num = (num_tds % UHCI_MAX_TD_NUM_PER_POOL);
3137                 }
3138 
3139                 td_pool_ptr1 = &info->td_pools[i];
3140 
3141                 /* Allocate the bulk TD pool DMA handle */
3142                 if (ddi_dma_alloc_handle(uhcip->uhci_dip,
3143                     &uhcip->uhci_dma_attr, DDI_DMA_SLEEP, 0,
3144                     &td_pool_ptr1->dma_handle) != DDI_SUCCESS) {
3145 
3146                         for (j = 0; j < i; j++) {
3147                                 td_pool_ptr2 = &info->td_pools[j];
3148                                 result = ddi_dma_unbind_handle(