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XXXX introduce drv_sectohz


2146  */
2147 static int
2148 iwh_load_init_firmware(iwh_sc_t *sc)
2149 {
2150         int err = IWH_FAIL;
2151         clock_t clk;
2152 
2153         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2154 
2155         /*
2156          * load init_text section of uCode to hardware
2157          */
2158         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_init_text.cookie.dmac_address,
2159             RTC_INST_LOWER_BOUND, sc->sc_dma_fw_init_text.cookie.dmac_size);
2160         if (err != IWH_SUCCESS) {
2161                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2162                     "failed to write init uCode.\n");
2163                 return (err);
2164         }
2165 
2166         clk = ddi_get_lbolt() + drv_usectohz(1000000);
2167 
2168         /*
2169          * wait loading init_text until completed or timeout
2170          */
2171         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2172                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2173                         break;
2174                 }
2175         }
2176 
2177         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2178                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2179                     "timeout waiting for init uCode load.\n");
2180                 return (IWH_FAIL);
2181         }
2182 
2183         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2184 
2185         /*
2186          * load init_data section of uCode to hardware
2187          */
2188         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_init_data.cookie.dmac_address,
2189             RTC_DATA_LOWER_BOUND, sc->sc_dma_fw_init_data.cookie.dmac_size);
2190         if (err != IWH_SUCCESS) {
2191                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2192                     "failed to write init_data uCode.\n");
2193                 return (err);
2194         }
2195 
2196         clk = ddi_get_lbolt() + drv_usectohz(1000000);
2197 
2198         /*
2199          * wait loading init_data until completed or timeout
2200          */
2201         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2202                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2203                         break;
2204                 }
2205         }
2206 
2207         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2208                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2209                     "timeout waiting for init_data uCode load.\n");
2210                 return (IWH_FAIL);
2211         }
2212 
2213         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2214 
2215         return (err);
2216 }
2217 
2218 static int
2219 iwh_load_run_firmware(iwh_sc_t *sc)
2220 {
2221         int err = IWH_FAIL;
2222         clock_t clk;
2223 
2224         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2225 
2226         /*
2227          * load init_text section of uCode to hardware
2228          */
2229         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_text.cookie.dmac_address,
2230             RTC_INST_LOWER_BOUND, sc->sc_dma_fw_text.cookie.dmac_size);
2231         if (err != IWH_SUCCESS) {
2232                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2233                     "failed to write run uCode.\n");
2234                 return (err);
2235         }
2236 
2237         clk = ddi_get_lbolt() + drv_usectohz(1000000);
2238 
2239         /*
2240          * wait loading run_text until completed or timeout
2241          */
2242         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2243                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2244                         break;
2245                 }
2246         }
2247 
2248         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2249                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2250                     "timeout waiting for run uCode load.\n");
2251                 return (IWH_FAIL);
2252         }
2253 
2254         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2255 
2256         /*
2257          * load run_data section of uCode to hardware
2258          */
2259         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_data_bak.cookie.dmac_address,
2260             RTC_DATA_LOWER_BOUND, sc->sc_dma_fw_data.cookie.dmac_size);
2261         if (err != IWH_SUCCESS) {
2262                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2263                     "failed to write run_data uCode.\n");
2264                 return (err);
2265         }
2266 
2267         clk = ddi_get_lbolt() + drv_usectohz(1000000);
2268 
2269         /*
2270          * wait loading run_data until completed or timeout
2271          */
2272         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2273                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2274                         break;
2275                 }
2276         }
2277 
2278         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2279                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2280                     "timeout waiting for run_data uCode load.\n");
2281                 return (IWH_FAIL);
2282         }
2283 
2284         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2285 
2286         return (err);
2287 }


3855                                 }
3856                         }
3857                 }
3858 
3859                 if (ic->ic_mach &&
3860                     (sc->sc_flags & IWH_F_SCANNING) && sc->sc_scan_pending) {
3861                         IWH_DBG((IWH_DEBUG_SCAN, "iwh_thread(): "
3862                             "wait for probe response\n"));
3863 
3864                         sc->sc_scan_pending--;
3865                         delay(drv_usectohz(200000));
3866                         ieee80211_next_scan(ic);
3867                 }
3868 
3869                 /*
3870                  * rate ctl
3871                  */
3872                 if (ic->ic_mach &&
3873                     (sc->sc_flags & IWH_F_RATE_AUTO_CTL)) {
3874                         clk = ddi_get_lbolt();
3875                         if (clk > sc->sc_clk + drv_usectohz(1000000)) {
3876                                 iwh_amrr_timeout(sc);
3877                         }
3878                 }
3879 
3880                 if ((ic->ic_state == IEEE80211_S_RUN) &&
3881                     (ic->ic_beaconmiss++ > 100)) {        /* 10 seconds */
3882                         cmn_err(CE_WARN, "iwh: beacon missed for 10 seconds\n");
3883                         (void) ieee80211_new_state(ic,
3884                             IEEE80211_S_INIT, -1);
3885                 }
3886 
3887                 delay(drv_usectohz(100000));
3888 
3889                 mutex_enter(&sc->sc_mt_lock);
3890                 if (sc->sc_tx_timer) {
3891                         timeout++;
3892                         if (10 == timeout) {
3893                                 sc->sc_tx_timer--;
3894                                 if (0 == sc->sc_tx_timer) {
3895                                         atomic_or_32(&sc->sc_flags,


4812          * backup ucode data part for future use.
4813          */
4814         bcopy(sc->sc_dma_fw_data.mem_va,
4815             sc->sc_dma_fw_data_bak.mem_va,
4816             sc->sc_dma_fw_data.alength);
4817 
4818         /* load firmware init segment into NIC */
4819         err = iwh_load_init_firmware(sc);
4820         if (err != IWH_SUCCESS) {
4821                 cmn_err(CE_WARN, "iwh_init(): "
4822                     "failed to setup init firmware\n");
4823                 mutex_exit(&sc->sc_glock);
4824                 return (IWH_FAIL);
4825         }
4826 
4827         /*
4828          * now press "execute" start running
4829          */
4830         IWH_WRITE(sc, CSR_RESET, 0);
4831 
4832         clk = ddi_get_lbolt() + drv_usectohz(1000000);
4833         while (!(sc->sc_flags & IWH_F_FW_INIT)) {
4834                 if (cv_timedwait(&sc->sc_ucode_cv,
4835                     &sc->sc_glock, clk) < 0) {
4836                         break;
4837                 }
4838         }
4839 
4840         if (!(sc->sc_flags & IWH_F_FW_INIT)) {
4841                 cmn_err(CE_WARN, "iwh_init(): "
4842                     "failed to process init alive.\n");
4843                 mutex_exit(&sc->sc_glock);
4844                 return (IWH_FAIL);
4845         }
4846 
4847         mutex_exit(&sc->sc_glock);
4848 
4849         /*
4850          * stop chipset for initializing chipset again
4851          */
4852         iwh_stop(sc);


4859                 mutex_exit(&sc->sc_glock);
4860                 return (IWH_FAIL);
4861         }
4862 
4863         /*
4864          * load firmware run segment into NIC
4865          */
4866         err = iwh_load_run_firmware(sc);
4867         if (err != IWH_SUCCESS) {
4868                 cmn_err(CE_WARN, "iwh_init(): "
4869                     "failed to setup run firmware\n");
4870                 mutex_exit(&sc->sc_glock);
4871                 return (IWH_FAIL);
4872         }
4873 
4874         /*
4875          * now press "execute" start running
4876          */
4877         IWH_WRITE(sc, CSR_RESET, 0);
4878 
4879         clk = ddi_get_lbolt() + drv_usectohz(1000000);
4880         while (!(sc->sc_flags & IWH_F_FW_INIT)) {
4881                 if (cv_timedwait(&sc->sc_ucode_cv,
4882                     &sc->sc_glock, clk) < 0) {
4883                         break;
4884                 }
4885         }
4886 
4887         if (!(sc->sc_flags & IWH_F_FW_INIT)) {
4888                 cmn_err(CE_WARN, "iwh_init(): "
4889                     "failed to process runtime alive.\n");
4890                 mutex_exit(&sc->sc_glock);
4891                 return (IWH_FAIL);
4892         }
4893 
4894         mutex_exit(&sc->sc_glock);
4895 
4896         DELAY(1000);
4897 
4898         mutex_enter(&sc->sc_glock);
4899         atomic_and_32(&sc->sc_flags, ~IWH_F_FW_INIT);




2146  */
2147 static int
2148 iwh_load_init_firmware(iwh_sc_t *sc)
2149 {
2150         int err = IWH_FAIL;
2151         clock_t clk;
2152 
2153         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2154 
2155         /*
2156          * load init_text section of uCode to hardware
2157          */
2158         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_init_text.cookie.dmac_address,
2159             RTC_INST_LOWER_BOUND, sc->sc_dma_fw_init_text.cookie.dmac_size);
2160         if (err != IWH_SUCCESS) {
2161                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2162                     "failed to write init uCode.\n");
2163                 return (err);
2164         }
2165 
2166         clk = ddi_get_lbolt() + drv_sectohz(1);
2167 
2168         /*
2169          * wait loading init_text until completed or timeout
2170          */
2171         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2172                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2173                         break;
2174                 }
2175         }
2176 
2177         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2178                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2179                     "timeout waiting for init uCode load.\n");
2180                 return (IWH_FAIL);
2181         }
2182 
2183         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2184 
2185         /*
2186          * load init_data section of uCode to hardware
2187          */
2188         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_init_data.cookie.dmac_address,
2189             RTC_DATA_LOWER_BOUND, sc->sc_dma_fw_init_data.cookie.dmac_size);
2190         if (err != IWH_SUCCESS) {
2191                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2192                     "failed to write init_data uCode.\n");
2193                 return (err);
2194         }
2195 
2196         clk = ddi_get_lbolt() + drv_sectohz(1);
2197 
2198         /*
2199          * wait loading init_data until completed or timeout
2200          */
2201         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2202                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2203                         break;
2204                 }
2205         }
2206 
2207         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2208                 cmn_err(CE_WARN, "iwh_load_init_firmware(): "
2209                     "timeout waiting for init_data uCode load.\n");
2210                 return (IWH_FAIL);
2211         }
2212 
2213         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2214 
2215         return (err);
2216 }
2217 
2218 static int
2219 iwh_load_run_firmware(iwh_sc_t *sc)
2220 {
2221         int err = IWH_FAIL;
2222         clock_t clk;
2223 
2224         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2225 
2226         /*
2227          * load init_text section of uCode to hardware
2228          */
2229         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_text.cookie.dmac_address,
2230             RTC_INST_LOWER_BOUND, sc->sc_dma_fw_text.cookie.dmac_size);
2231         if (err != IWH_SUCCESS) {
2232                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2233                     "failed to write run uCode.\n");
2234                 return (err);
2235         }
2236 
2237         clk = ddi_get_lbolt() + drv_sectohz(1);
2238 
2239         /*
2240          * wait loading run_text until completed or timeout
2241          */
2242         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2243                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2244                         break;
2245                 }
2246         }
2247 
2248         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2249                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2250                     "timeout waiting for run uCode load.\n");
2251                 return (IWH_FAIL);
2252         }
2253 
2254         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2255 
2256         /*
2257          * load run_data section of uCode to hardware
2258          */
2259         err = iwh_put_seg_fw(sc, sc->sc_dma_fw_data_bak.cookie.dmac_address,
2260             RTC_DATA_LOWER_BOUND, sc->sc_dma_fw_data.cookie.dmac_size);
2261         if (err != IWH_SUCCESS) {
2262                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2263                     "failed to write run_data uCode.\n");
2264                 return (err);
2265         }
2266 
2267         clk = ddi_get_lbolt() + drv_sectohz(1);
2268 
2269         /*
2270          * wait loading run_data until completed or timeout
2271          */
2272         while (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2273                 if (cv_timedwait(&sc->sc_put_seg_cv, &sc->sc_glock, clk) < 0) {
2274                         break;
2275                 }
2276         }
2277 
2278         if (!(sc->sc_flags & IWH_F_PUT_SEG)) {
2279                 cmn_err(CE_WARN, "iwh_load_run_firmware(): "
2280                     "timeout waiting for run_data uCode load.\n");
2281                 return (IWH_FAIL);
2282         }
2283 
2284         atomic_and_32(&sc->sc_flags, ~IWH_F_PUT_SEG);
2285 
2286         return (err);
2287 }


3855                                 }
3856                         }
3857                 }
3858 
3859                 if (ic->ic_mach &&
3860                     (sc->sc_flags & IWH_F_SCANNING) && sc->sc_scan_pending) {
3861                         IWH_DBG((IWH_DEBUG_SCAN, "iwh_thread(): "
3862                             "wait for probe response\n"));
3863 
3864                         sc->sc_scan_pending--;
3865                         delay(drv_usectohz(200000));
3866                         ieee80211_next_scan(ic);
3867                 }
3868 
3869                 /*
3870                  * rate ctl
3871                  */
3872                 if (ic->ic_mach &&
3873                     (sc->sc_flags & IWH_F_RATE_AUTO_CTL)) {
3874                         clk = ddi_get_lbolt();
3875                         if (clk > sc->sc_clk + drv_sectohz(1)) {
3876                                 iwh_amrr_timeout(sc);
3877                         }
3878                 }
3879 
3880                 if ((ic->ic_state == IEEE80211_S_RUN) &&
3881                     (ic->ic_beaconmiss++ > 100)) {        /* 10 seconds */
3882                         cmn_err(CE_WARN, "iwh: beacon missed for 10 seconds\n");
3883                         (void) ieee80211_new_state(ic,
3884                             IEEE80211_S_INIT, -1);
3885                 }
3886 
3887                 delay(drv_usectohz(100000));
3888 
3889                 mutex_enter(&sc->sc_mt_lock);
3890                 if (sc->sc_tx_timer) {
3891                         timeout++;
3892                         if (10 == timeout) {
3893                                 sc->sc_tx_timer--;
3894                                 if (0 == sc->sc_tx_timer) {
3895                                         atomic_or_32(&sc->sc_flags,


4812          * backup ucode data part for future use.
4813          */
4814         bcopy(sc->sc_dma_fw_data.mem_va,
4815             sc->sc_dma_fw_data_bak.mem_va,
4816             sc->sc_dma_fw_data.alength);
4817 
4818         /* load firmware init segment into NIC */
4819         err = iwh_load_init_firmware(sc);
4820         if (err != IWH_SUCCESS) {
4821                 cmn_err(CE_WARN, "iwh_init(): "
4822                     "failed to setup init firmware\n");
4823                 mutex_exit(&sc->sc_glock);
4824                 return (IWH_FAIL);
4825         }
4826 
4827         /*
4828          * now press "execute" start running
4829          */
4830         IWH_WRITE(sc, CSR_RESET, 0);
4831 
4832         clk = ddi_get_lbolt() + drv_sectohz(1);
4833         while (!(sc->sc_flags & IWH_F_FW_INIT)) {
4834                 if (cv_timedwait(&sc->sc_ucode_cv,
4835                     &sc->sc_glock, clk) < 0) {
4836                         break;
4837                 }
4838         }
4839 
4840         if (!(sc->sc_flags & IWH_F_FW_INIT)) {
4841                 cmn_err(CE_WARN, "iwh_init(): "
4842                     "failed to process init alive.\n");
4843                 mutex_exit(&sc->sc_glock);
4844                 return (IWH_FAIL);
4845         }
4846 
4847         mutex_exit(&sc->sc_glock);
4848 
4849         /*
4850          * stop chipset for initializing chipset again
4851          */
4852         iwh_stop(sc);


4859                 mutex_exit(&sc->sc_glock);
4860                 return (IWH_FAIL);
4861         }
4862 
4863         /*
4864          * load firmware run segment into NIC
4865          */
4866         err = iwh_load_run_firmware(sc);
4867         if (err != IWH_SUCCESS) {
4868                 cmn_err(CE_WARN, "iwh_init(): "
4869                     "failed to setup run firmware\n");
4870                 mutex_exit(&sc->sc_glock);
4871                 return (IWH_FAIL);
4872         }
4873 
4874         /*
4875          * now press "execute" start running
4876          */
4877         IWH_WRITE(sc, CSR_RESET, 0);
4878 
4879         clk = ddi_get_lbolt() + drv_sectohz(1);
4880         while (!(sc->sc_flags & IWH_F_FW_INIT)) {
4881                 if (cv_timedwait(&sc->sc_ucode_cv,
4882                     &sc->sc_glock, clk) < 0) {
4883                         break;
4884                 }
4885         }
4886 
4887         if (!(sc->sc_flags & IWH_F_FW_INIT)) {
4888                 cmn_err(CE_WARN, "iwh_init(): "
4889                     "failed to process runtime alive.\n");
4890                 mutex_exit(&sc->sc_glock);
4891                 return (IWH_FAIL);
4892         }
4893 
4894         mutex_exit(&sc->sc_glock);
4895 
4896         DELAY(1000);
4897 
4898         mutex_enter(&sc->sc_glock);
4899         atomic_and_32(&sc->sc_flags, ~IWH_F_FW_INIT);