62
63 /* Maximum allowable data transfer size per transaction */
64 #define UHCI_MAX_TD_XFER_SIZE 0x500 /* Maximum data per transaction */
65
66 /*
67 * Generic UHCI Macro definitions
68 */
69 #define UHCI_UNDERRUN_OCCURRED 0x1234
70 #define UHCI_OVERRUN_OCCURRED 0x5678
71 #define UHCI_PROP_MASK 0x01000020
72 #define UHCI_RESET_DELAY 15000
73 #define UHCI_TIMEWAIT 10000
74
75 #define MAX_SOF_WAIT_COUNT 2
76 #define MAX_RH_PORTS 2
77 #define DISCONNECTED 2
78 #define POLLING_FREQ_7MS 7
79 #define PCI_CONF_IOBASE 0x20
80 #define PCI_CONF_IOBASE_MASK 0xffe0
81
82 #define UHCI_ONE_SECOND drv_usectohz(1000000)
83 #define UHCI_ONE_MS drv_usectohz(1000)
84 #define UHCI_32_MS drv_usectohz(32*1000)
85 #define UHCI_256_MS drv_usectohz(256*1000)
86 #define UHCI_MAX_INSTS 4
87
88 #define POLLED_RAW_BUF_SIZE 8
89
90 /* Default time out values for bulk and ctrl commands */
91 #define UHCI_CTRL_TIMEOUT 5
92 #define UHCI_BULK_TIMEOUT 60
93
94 /* UHCI root hub structure */
95 typedef struct uhci_root_hub_info {
96 uint_t rh_status; /* Last RH status */
97 uint_t rh_num_ports; /* #ports on the root */
98
99 /* Last status of ports */
100 uint_t rh_port_status[MAX_RH_PORTS];
101 uint_t rh_port_changes[MAX_RH_PORTS];
102 uint_t rh_port_state[MAX_RH_PORTS]; /* See below */
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62
63 /* Maximum allowable data transfer size per transaction */
64 #define UHCI_MAX_TD_XFER_SIZE 0x500 /* Maximum data per transaction */
65
66 /*
67 * Generic UHCI Macro definitions
68 */
69 #define UHCI_UNDERRUN_OCCURRED 0x1234
70 #define UHCI_OVERRUN_OCCURRED 0x5678
71 #define UHCI_PROP_MASK 0x01000020
72 #define UHCI_RESET_DELAY 15000
73 #define UHCI_TIMEWAIT 10000
74
75 #define MAX_SOF_WAIT_COUNT 2
76 #define MAX_RH_PORTS 2
77 #define DISCONNECTED 2
78 #define POLLING_FREQ_7MS 7
79 #define PCI_CONF_IOBASE 0x20
80 #define PCI_CONF_IOBASE_MASK 0xffe0
81
82 #define UHCI_ONE_SECOND drv_sectohz(1)
83 #define UHCI_ONE_MS drv_usectohz(1000)
84 #define UHCI_32_MS drv_usectohz(32*1000)
85 #define UHCI_256_MS drv_usectohz(256*1000)
86 #define UHCI_MAX_INSTS 4
87
88 #define POLLED_RAW_BUF_SIZE 8
89
90 /* Default time out values for bulk and ctrl commands */
91 #define UHCI_CTRL_TIMEOUT 5
92 #define UHCI_BULK_TIMEOUT 60
93
94 /* UHCI root hub structure */
95 typedef struct uhci_root_hub_info {
96 uint_t rh_status; /* Last RH status */
97 uint_t rh_num_ports; /* #ports on the root */
98
99 /* Last status of ports */
100 uint_t rh_port_status[MAX_RH_PORTS];
101 uint_t rh_port_changes[MAX_RH_PORTS];
102 uint_t rh_port_state[MAX_RH_PORTS]; /* See below */
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