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XXXX introduce drv_sectohz

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          --- old/usr/src/uts/i86xpv/cpu/generic_cpu/gcpu_poll_xpv.c
          +++ new/usr/src/uts/i86xpv/cpu/generic_cpu/gcpu_poll_xpv.c
↓ open down ↓ 115 lines elided ↑ open up ↑
 116  116  
 117  117          if (hdl != NULL) {
 118  118                  cmi_mc_logout(hdl, 0, 0);
 119  119                  cmi_hdl_rele(hdl);
 120  120          }
 121  121  
 122  122          if (arg == GCPU_XPV_MCH_POLL_REARM &&
 123  123              gcpu_xpv_mch_poll_interval_secs != 0) {
 124  124                  gcpu_xpv_mch_poll_timeoutid = timeout(gcpu_xpv_mch_poll,
 125  125                      GCPU_XPV_MCH_POLL_REARM,
 126      -                    drv_usectohz(gcpu_xpv_mch_poll_interval_secs * MICROSEC));
      126 +                    drv_sectohz(gcpu_xpv_mch_poll_interval_secs));
 127  127          }
 128  128  }
 129  129  
 130  130  /*
 131  131   * gcpu_mca_poll_init is called from gcpu_mca_init for each cpu handle
 132  132   * that we initialize for.  It should prepare for polling by allocating
 133  133   * control structures and the like, but must not kick polling off yet.
 134  134   *
 135  135   * Since we initialize all cpus in a serialized loop there is no race
 136  136   * on allocating the bankregs structure, nor in free'ing and enlarging
↓ open down ↓ 39 lines elided ↑ open up ↑
 176  176           * multiprocessor startup.
 177  177           */
 178  178          if (gcpu_xpv_poll_bankregs_sz != 0 && gcpu_xpv_virq_vect == -1) {
 179  179                  /*
 180  180                   * The hypervisor will poll MCA state for us, but it cannot
 181  181                   * poll MCH state so we do that via a timeout.
 182  182                   */
 183  183                  if (gcpu_xpv_mch_poll_interval_secs != 0) {
 184  184                          gcpu_xpv_mch_poll_timeoutid =
 185  185                              timeout(gcpu_xpv_mch_poll, GCPU_XPV_MCH_POLL_REARM,
 186      -                            drv_usectohz(gcpu_xpv_mch_poll_interval_secs *
 187      -                            MICROSEC));
      186 +                            drv_sectohz(gcpu_xpv_mch_poll_interval_secs));
 188  187                  }
 189  188  
 190  189                  /*
 191  190                   * Register handler for VIRQ_MCA; once this is in place
 192  191                   * the hypervisor will begin to forward polled MCA observations
 193  192                   * to us.
 194  193                   */
 195  194                  gcpu_xpv_virq_vect = ec_bind_virq_to_irq(VIRQ_MCA, 0);
 196  195                  (void) add_avintr(NULL, gcpu_xpv_virq_level,
 197  196                      (avfunc)gcpu_xpv_virq_intr, "MCA", gcpu_xpv_virq_vect,
 198  197                      NULL, NULL, NULL, NULL);
 199  198          }
 200  199  }
    
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