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remove zulu (XVR-4000)
XVR-4000 was a very expensive, very rare graphics card.
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--- old/usr/src/uts/sun4u/serengeti/sys/sgfrutypes.h
+++ new/usr/src/uts/sun4u/serengeti/sys/sgfrutypes.h
1 1 /*
2 2 * CDDL HEADER START
3 3 *
4 4 * The contents of this file are subject to the terms of the
5 5 * Common Development and Distribution License (the "License").
6 6 * You may not use this file except in compliance with the License.
7 7 *
8 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 9 * or http://www.opensolaris.org/os/licensing.
10 10 * See the License for the specific language governing permissions
11 11 * and limitations under the License.
12 12 *
13 13 * When distributing Covered Code, include this CDDL HEADER in each
14 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 15 * If applicable, add the following below this CDDL HEADER, with the
16 16 * fields enclosed by brackets "[]" replaced with your own identifying
17 17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 18 *
19 19 * CDDL HEADER END
20 20 */
21 21
22 22 /*
23 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
24 24 * Use is subject to license terms.
25 25 */
26 26
27 27 #ifndef _SYS_SGFRUTYPES_H
28 28 #define _SYS_SGFRUTYPES_H
29 29
30 30 #ifdef __cplusplus
31 31 extern "C" {
32 32 #endif
33 33
34 34 /*
35 35 * sgfrutypes.h - Serengeti/WildCat/Lightweight8 common FRU definitions
36 36 *
37 37 * This header file contains the common FRU-ID definitions and macros for the
38 38 * Serengeti, WildCat and Lightweight8 platforms.
39 39 *
40 40 * - definitions of the various FRU types.
41 41 * - macros to generate FRU names.
42 42 *
43 43 * (Not to be confused with the header files for the SGFRU driver)
44 44 */
45 45
46 46 /*
47 47 * Known HPU/FRU types
48 48 *
49 49 * These FRU definitions are common to both the Serengeti and LightWeight8
50 50 * platforms. They are used by various macros used by both platforms as well
51 51 * as the LW8 specific SGENV (environmentals) driver.
52 52 */
53 53 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD (0x101)
54 54 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_STR \
55 55 "System Controller Board"
56 56 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_ID "SSC"
57 57 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_SHORTNAME "SSC"
58 58
59 59 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800 (0x102)
60 60 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800_STR \
61 61 "System Controller Board (F3800)"
62 62 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800_ID "SSC"
63 63 #define SG_HPU_TYPE_SYSTEM_CONTROLLER_BOARD_F3800_SHORTNAME "SSC"
64 64
65 65
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66 66 #define SG_HPU_TYPE_CPU_BOARD (0x201)
67 67 #define SG_HPU_TYPE_CPU_BOARD_STR "CPU Board"
68 68 #define SG_HPU_TYPE_CPU_BOARD_ID "SB"
69 69 #define SG_HPU_TYPE_CPU_BOARD_SHORTNAME "CPU"
70 70
71 71 #define SG_HPU_TYPE_WIB_BOARD (0x202)
72 72 #define SG_HPU_TYPE_WIB_BOARD_STR "WIB Board"
73 73 #define SG_HPU_TYPE_WIB_BOARD_ID "SB"
74 74 #define SG_HPU_TYPE_WIB_BOARD_SHORTNAME "WIB"
75 75
76 -#define SG_HPU_TYPE_ZULU_BOARD (0x203)
77 -#define SG_HPU_TYPE_ZULU_BOARD_STR "Zulu Board"
78 -#define SG_HPU_TYPE_ZULU_BOARD_ID "SB"
79 -#define SG_HPU_TYPE_ZULU_BOARD_SHORTNAME "GPX"
80 -
81 -
82 76 #define SG_HPU_TYPE_REPEATER_BOARD (0x301)
83 77 #define SG_HPU_TYPE_REPEATER_BOARD_STR "Repeater Board"
84 78 #define SG_HPU_TYPE_REPEATER_BOARD_ID "RP"
85 79
86 80 #define SG_HPU_TYPE_LOGIC_ANALYZER_BOARD (0x302)
87 81 #define SG_HPU_TYPE_LOGIC_ANALYZER_BOARD_STR "Logic Analyzer Board"
88 82 #define SG_HPU_TYPE_LOGIC_ANALYZER_BOARD_ID "RP"
89 83
90 84 #define SG_HPU_TYPE_REPEATER_BOARD_F3800 (0x303)
91 85 #define SG_HPU_TYPE_REPEATER_BOARD_F3800_STR "Repeater Board (F3800)"
92 86 #define SG_HPU_TYPE_REPEATER_BOARD_F3800_ID "RP"
93 87 #define SG_HPU_TYPE_REPEATER_BOARD_F3800_SHORTNAME "RP"
94 88
95 89
96 90 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO (0x401)
97 91 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO_STR "Fan Tray (F6800, I/O)"
98 92 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO_ID "FT"
99 93 #define SG_HPU_TYPE_FAN_TRAY_F6800_IO_SHORTNAME "FAN"
100 94
101 95 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU (0x402)
102 96 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU_STR "Fan Tray (F6800, CPU)"
103 97 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU_ID "FT"
104 98 #define SG_HPU_TYPE_FAN_TRAY_F6800_CPU_SHORTNAME "FAN"
105 99
106 100 #define SG_HPU_TYPE_FAN_TRAY_RACK (0x403)
107 101 #define SG_HPU_TYPE_FAN_TRAY_RACK_STR "Fan Tray (Rack)"
108 102 #define SG_HPU_TYPE_FAN_TRAY_RACK_ID "FT"
109 103 #define SG_HPU_TYPE_FAN_TRAY_RACK_SHORTNAME "RACKFAN"
110 104
111 105 #define SG_HPU_TYPE_FAN_TRAY_F4810 (0x404)
112 106 #define SG_HPU_TYPE_FAN_TRAY_F4810_STR "Fan Tray (F4810)"
113 107 #define SG_HPU_TYPE_FAN_TRAY_F4810_ID "FT"
114 108 #define SG_HPU_TYPE_FAN_TRAY_F4810_SHORTNAME "FAN"
115 109
116 110 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO (0x405)
117 111 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO_STR "Fan Tray (F4800, I/O)"
118 112 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO_ID "FT"
119 113 #define SG_HPU_TYPE_FAN_TRAY_F4800_IO_SHORTNAME "FAN"
120 114
121 115 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU (0x406)
122 116 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU_STR "Fan Tray (F4800, CPU)"
123 117 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU_ID "FT"
124 118 #define SG_HPU_TYPE_FAN_TRAY_F4800_CPU_SHORTNAME "FAN"
125 119
126 120 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO (0x407)
127 121 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO_STR \
128 122 "Fan Tray (F4800, Top I/O)"
129 123 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO_ID "FT"
130 124 #define SG_HPU_TYPE_FAN_TRAY_F4800_TOP_IO_SHORTNAME "FAN"
131 125
132 126 #define SG_HPU_TYPE_FAN_TRAY_F3800 (0x408)
133 127 #define SG_HPU_TYPE_FAN_TRAY_F3800_STR "Fan Tray (F3800)"
134 128 #define SG_HPU_TYPE_FAN_TRAY_F3800_ID "FT"
135 129 #define SG_HPU_TYPE_FAN_TRAY_F3800_SHORTNAME "FAN"
136 130
137 131 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO (0x409)
138 132 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO_STR \
139 133 "Fan Tray (F4800, Bottom I/O)"
140 134 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO_ID "FT"
141 135 #define SG_HPU_TYPE_FAN_TRAY_F4800_BOTTOM_IO_SHORTNAME "FAN"
142 136
143 137
144 138 #define SG_HPU_TYPE_PCI_IO_BOARD (0x501)
145 139 #define SG_HPU_TYPE_PCI_IO_BOARD_STR "PCI I/O Board"
146 140 #define SG_HPU_TYPE_PCI_IO_BOARD_ID "IB"
147 141 #define SG_HPU_TYPE_PCI_IO_BOARD_SHORTNAME "PCIB"
148 142
149 143 #define SG_HPU_TYPE_CPCI_IO_BOARD (0x502)
150 144 #define SG_HPU_TYPE_CPCI_IO_BOARD_STR "CPCI I/O board"
151 145 #define SG_HPU_TYPE_CPCI_IO_BOARD_ID "IB"
152 146 #define SG_HPU_TYPE_CPCI_IO_BOARD_SHORTNAME "CPCB"
153 147
154 148 #define SG_HPU_TYPE_CPCI_IO_BOARD_F3800 (0x503)
155 149 #define SG_HPU_TYPE_CPCI_IO_BOARD_F3800_STR "CPCI I/O board (F3800)"
156 150 #define SG_HPU_TYPE_CPCI_IO_BOARD_F3800_ID "IB"
157 151
158 152 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD (0x504)
159 153 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_STR "WCI cPCI I/O Board"
160 154 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_ID "IB"
161 155
162 156 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_F3800 (0x505)
163 157 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_F3800_STR "WCI cPCI I/O Board (F3800)"
164 158 #define SG_HPU_TYPE_WCI_CPCI_IO_BOARD_F3800_ID "IB"
165 159
166 160
167 161 #define SG_HPU_TYPE_A123_POWER_SUPPLY (0x601)
168 162 #define SG_HPU_TYPE_A123_POWER_SUPPLY_STR "A123 Power Supply"
169 163 #define SG_HPU_TYPE_A123_POWER_SUPPLY_ID "PS"
170 164 #define SG_HPU_TYPE_A123_POWER_SUPPLY_SHORTNAME "PS"
171 165
172 166 #define SG_HPU_TYPE_A138_POWER_SUPPLY (0x602)
173 167 #define SG_HPU_TYPE_A138_POWER_SUPPLY_STR "A138 Power Supply"
174 168 #define SG_HPU_TYPE_A138_POWER_SUPPLY_ID "PS"
175 169 #define SG_HPU_TYPE_A138_POWER_SUPPLY_SHORTNAME "PS"
176 170
177 171 #define SG_HPU_TYPE_A145_POWER_SUPPLY (0x603)
178 172 #define SG_HPU_TYPE_A145_POWER_SUPPLY_STR "A145 Power Supply"
179 173 #define SG_HPU_TYPE_A145_POWER_SUPPLY_ID "PS"
180 174 #define SG_HPU_TYPE_A145_POWER_SUPPLY_SHORTNAME "PS"
181 175
182 176 #define SG_HPU_TYPE_A152_POWER_SUPPLY (0x604)
183 177 #define SG_HPU_TYPE_A152_POWER_SUPPLY_STR "A152 Power Supply"
184 178 #define SG_HPU_TYPE_A152_POWER_SUPPLY_ID "PS"
185 179 #define SG_HPU_TYPE_A152_POWER_SUPPLY_SHORTNAME "PS"
186 180
187 181 #define SG_HPU_TYPE_A153_POWER_SUPPLY (0x605)
188 182 #define SG_HPU_TYPE_A153_POWER_SUPPLY_STR "A153 Power Supply"
189 183 #define SG_HPU_TYPE_A153_POWER_SUPPLY_ID "PS"
190 184 #define SG_HPU_TYPE_A153_POWER_SUPPLY_SHORTNAME "PS"
191 185
192 186
193 187 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE (0x701) /* 0x701 */
194 188 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE_STR \
195 189 "Sun Fire 3800 Centerplane"
196 190 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE_ID "ID"
197 191 #define SG_HPU_TYPE_SUN_FIRE_3800_CENTERPLANE_SHORTNAME "ID"
198 192
199 193 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE (0x702) /* 0x702 */
200 194 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE_STR \
201 195 "Sun Fire 6800 Centerplane"
202 196 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE_ID "ID"
203 197 #define SG_HPU_TYPE_SUN_FIRE_6800_CENTERPLANE_SHORTNAME "ID"
204 198
205 199 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE (0x703) /* 0x703 */
206 200 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE_STR \
207 201 "Sun Fire 4810 Centerplane"
208 202 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE_ID "ID"
209 203 #define SG_HPU_TYPE_SUN_FIRE_4810_CENTERPLANE_SHORTNAME "ID"
210 204
211 205 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE (0x704) /* 0x704 */
212 206 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE_STR \
213 207 "Sun Fire 4800 Centerplane"
214 208 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE_ID "ID"
215 209 #define SG_HPU_TYPE_SUN_FIRE_4800_CENTERPLANE_SHORTNAME "ID"
216 210
217 211 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE (0x705)
218 212 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE_STR \
219 213 "Sun Fire 3800 Replacement Centerplane"
220 214 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE_ID "ID"
221 215 #define SG_HPU_TYPE_SUN_FIRE_3800_REPLACEMENT_CENTERPLANE_SHORTNAME "ID"
222 216
223 217 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE (0x706)
224 218 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE_STR \
225 219 "Sun Fire 6800 Replacement Centerplane"
226 220 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE_ID "ID"
227 221 #define SG_HPU_TYPE_SUN_FIRE_6800_REPLACEMENT_CENTERPLANE_SHORTNAME "ID"
228 222
229 223 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE (0x707)
230 224 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE_STR \
231 225 "Sun Fire 4810 Replacement Centerplane"
232 226 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE_ID "ID"
233 227 #define SG_HPU_TYPE_SUN_FIRE_4810_REPLACEMENT_CENTERPLANE_SHORTNAME "ID"
234 228
235 229 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE (0x708)
236 230 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE_STR \
237 231 "Sun Fire 4800 Replacement Centerplane"
238 232 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE_ID "ID"
239 233 #define SG_HPU_TYPE_SUN_FIRE_4800_REPLACEMENT_CENTERPLANE_SHORTNAME "ID"
240 234
241 235 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD (0x709) /* 0x709 */
242 236 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD_STR \
243 237 "Sun Fire Replacement ID Board"
244 238 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD_ID "ID"
245 239 #define SG_HPU_TYPE_SUN_FIRE_REPLACEMENT_ID_BOARD_SHORTNAME "ID"
246 240
247 241
248 242 #define SG_HPU_TYPE_AC_SEQUENCER (0x900)
249 243 #define SG_HPU_TYPE_AC_SEQUENCER_STR "AC Sequencer"
250 244 #define SG_HPU_TYPE_AC_SEQUENCER_ID "AC"
251 245 #define SG_HPU_TYPE_AC_SEQUENCER_SHORTNAME "AC"
252 246
253 247
254 248 #define SG_HPU_TYPE_2MB_ECACHE_MODULE ((10<<8)|1) /* 0xA01 */
255 249 #define SG_HPU_TYPE_2MB_ECACHE_MODULE_STR \
256 250 "2MB Ecache module"
257 251
258 252 #define SG_HPU_TYPE_2MB_ECACHE_MODULE_SHORTNAME "ECACHE"
259 253
260 254 #define SG_HPU_TYPE_4MB_ECACHE_MODULE ((10<<8)|2) /* 0xA02 */
261 255 #define SG_HPU_TYPE_4MB_ECACHE_MODULE_STR \
262 256 "4MB Ecache module"
263 257
264 258 #define SG_HPU_TYPE_4MB_ECACHE_MODULE_SHORTNAME "ECACHE"
265 259
266 260 #define SG_HPU_TYPE_DRAM_SLOT ((11<<8)|0) /* 0xB00 */
267 261 #define SG_HPU_TYPE_DRAM_SLOT_STR \
268 262 "DRAM slot"
269 263
270 264 #define SG_HPU_TYPE_DRAM_SLOT_SHORTNAME "DIMM"
271 265
272 266 #define SG_HPU_TYPE_128MB_DRAM_MODULE ((11<<8)|1) /* 0xB01 */
273 267 #define SG_HPU_TYPE_128MB_DRAM_MODULE_STR \
274 268 "128MB DRAM module"
275 269
276 270 #define SG_HPU_TYPE_128MB_DRAM_MODULE_SHORTNAME "DIMM"
277 271
278 272 #define SG_HPU_TYPE_256MB_DRAM_MODULE ((11<<8)|2) /* 0xB02 */
279 273 #define SG_HPU_TYPE_256MB_DRAM_MODULE_STR \
280 274 "256MB DRAM module"
281 275
282 276 #define SG_HPU_TYPE_256MB_DRAM_MODULE_SHORTNAME "DIMM"
283 277
284 278 #define SG_HPU_TYPE_512MB_DRAM_MODULE ((11<<8)|3) /* 0xB03 */
285 279 #define SG_HPU_TYPE_512MB_DRAM_MODULE_STR \
286 280 "512MB DRAM module"
287 281
288 282 #define SG_HPU_TYPE_512MB_DRAM_MODULE_SHORTNAME "DIMM"
289 283
290 284 #define SG_HPU_TYPE_1GB_DRAM_MODULE ((11<<8)|4) /* 0xB04 */
291 285 #define SG_HPU_TYPE_1GB_DRAM_MODULE_STR \
292 286 "1GB DRAM module"
293 287
294 288 #define SG_HPU_TYPE_1GB_DRAM_MODULE_SHORTNAME "DIMM"
295 289
296 290 /*
297 291 * These macros are used to generate the FRU Names of the various boards etc.
298 292 * A string is passed in to each macro and by calling a number of the
299 293 * macros a FRU name in the HLLN format can be built up.
300 294 *
301 295 * Note: The string needs to be initialized to an empty string before the
302 296 * first of these macros is called to generate a FRU Name.
303 297 */
304 298 #define MAX_FRU_NAME_LEN 20
305 299
306 300 #define SG_SET_FRU_NAME_NODE(str, num) \
307 301 { \
308 302 char tmp_str[MAX_FRU_NAME_LEN]; \
309 303 (void) sprintf(tmp_str, "/N%d", num); \
310 304 (void) strcat(str, tmp_str); \
311 305 }
312 306
313 307 #define SG_SET_FRU_NAME_CPU_BOARD(str, num) \
314 308 { \
315 309 char tmp_str[MAX_FRU_NAME_LEN]; \
316 310 (void) sprintf(tmp_str, "/%s%d", SG_HPU_TYPE_CPU_BOARD_ID, num); \
317 311 (void) strcat(str, tmp_str); \
318 312 }
319 313
320 314 #define SG_SET_FRU_NAME_IO_BOARD(str, num) \
321 315 { \
322 316 char tmp_str[MAX_FRU_NAME_LEN]; \
323 317 (void) sprintf(tmp_str, "/%s%d", SG_HPU_TYPE_PCI_IO_BOARD_ID, num); \
324 318 (void) strcat(str, tmp_str); \
325 319 }
326 320
327 321 #define SG_SET_FRU_NAME_MODULE(str, num) \
328 322 { \
329 323 char tmp_str[MAX_FRU_NAME_LEN]; \
330 324 (void) sprintf(tmp_str, "/P%d", num); \
331 325 (void) strcat(str, tmp_str); \
332 326 }
333 327
334 328 #define SG_SET_FRU_NAME_CORE(str, num) \
335 329 { \
336 330 char tmp_str[MAX_FRU_NAME_LEN]; \
337 331 (void) sprintf(tmp_str, "/C%d", num); \
338 332 (void) strcat(str, tmp_str); \
339 333 }
340 334
341 335 #define SG_SET_FRU_NAME_BANK(str, num) \
342 336 { \
343 337 char tmp_str[MAX_FRU_NAME_LEN]; \
344 338 (void) sprintf(tmp_str, "/B%d", num); \
345 339 (void) strcat(str, tmp_str); \
346 340 }
347 341
348 342 #define SG_SET_FRU_NAME_DIMM(str, num) \
349 343 { \
350 344 char tmp_str[MAX_FRU_NAME_LEN]; \
351 345 (void) sprintf(tmp_str, "/D%d", num); \
352 346 (void) strcat(str, tmp_str); \
353 347 }
354 348
355 349
356 350 #ifdef __cplusplus
357 351 }
358 352 #endif
359 353
360 354 #endif /* _SYS_SGFRUTYPES_H */
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